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TM4C1294KCPDT: ROM boot loader of TM4C1294KCPDTI3 does not start

  • Our Customer can not start with the setting of GPIO specified by BOOTCFG by ROM Bootloader of TM4C.

    The details are as follows.

    ROM Bootloader does not start when power is turned on by changing the corresponding port of GPIO and Polarity of Pin as set in BOOTCFG.

    The contents of BOOTCFG are as follows.

    <BOOTCFG setting>
    1. Write 0xFFFF37FE to FMD register
     PORT B = 0x01
     PIN 5 = 0x05
     POL = 1
     EN = 1
    2. Write 0x75100000 to FMA register
    3. Write 0xA4420008 or 0x71D50008 to the FMC register as follows
     KEY = 0 → 0x71D50008
     KEY = 1 → 0xA4420008

    Also, after turning the power OFF → ON after executing the Unlock sequence of the MCU, the ROM Bootloader was started.



    FMA, FMD, FMC were written at the beginning of the application each time, but Bootloader did not start.
    After writing to FMA, FMD, FMC, I waited until the COMT bit became 0.

    The following register values were confirmed after application activation.

    · Value of BOOTCFG register (0x400FE1D0): 0xFFFF37FE
    · Value of GPIODATA register (0x40059000) of GPIOB: 0x00000000

    For BOOTCFG, the value set for FMD was set.
    PB5 is set to HIGH, GPIODATA of GPIOB is 0.
    HIGH is not recognized?



    I attach the code of BOOTCFG writing.
  • Hello Kyogo,

    I think there is a misunderstanding about the settings required for EN.

    This is the Description for the EN bit from the datasheet: "Clearing this bit enables the use of a GPIO pin to enable the ROM Boot
    Loader at reset. When this bit is set, the contents of address 0x0000.0004 are checked to see if the Flash memory has been programmed. If the contents are not 0xFFFF.FFFF, the core executes out of Flash memory. If the Flash has not been programmed, the core executes out of ROM"

    The EN bit (i.e. bit 8) should be cleared (i.e. written to 0). Only then the ROM Bootloader will check if a registered GPIO (identified by the bits 13:15 of BOOTCFG register for the GPIO Port and bits 10:12 for the specific pin) is asserted (identified by bit 9 of BOOTCFG register). If the GPIO is asserted, then the ROM Bootloader continues to execute. If the GPIO is not asserted, the ROM Bootloader will check if a valid image is present in the flash and boot it.
  • Hello Ralpf,

    Thank you for your prompt reply.

    Immediately, I changed the EN bit to 0 (delete the line of | BOOTCFG_EN) and confirmed it.
    As a result, the situation will not change, the application will start.
    Also, I deleted the judgment statement of 0xFFFFFFFE and I tried to write the setting every time but the application will start.

    I misunderstood the explanation of the EN bit.
    Is the position of ④(GPIO condition judgment) in the following flow correct, not on the EN = 1 side but on the EN = 0 side?

    Also, is the method of confirming that PB5 is HIGH with the reading of GPIODATA register (0x40059000) value of GPIOB ?

    Best Regards,

    Kyogo

  • Hello Kyogo,

    Your diagram is accurate, that follows with the flow from Page 672 of the device datasheet.
  • Hello Ralph,

    Thank you for your reply.

    I confirmed the flow diagram and the description of the data sheet.

    Please also tell me how to check the polarity of PB 5.

    Best Regards,

    Kyogo

  • Hello Kyogo,

    I don't really understand your question, can you explain in more detail please?
  • Hello Ralph,

    The following register values were confirmed after application activation.
    · Value of BOOTCFG register (0x400FE1D0): 0xFFFF37FE
    · Value of GPIODATA register (0x40059000) of GPIOB: 0x00000000

    For BOOTCFG, the value set for FMD was set.
    PB5 is set to HIGH, GPIODATA of GPIOB is 0.
    HIGH is not recognized?

    As a method of confirming that PB 5 is HIGH, the GPIOB
    Is it correct by reading the GPIODATA register (0x40059000) value?

    Best Regards,
    Kyogo
  • Hello Kyogo,

    I must apologize for my prior comment about the accuracy of the diagram. When I reviewed it, I thought it was accurate but I notice now two differences which need to be addressed. In order to best explain the process, I have put together a diagram myself which I hope will help show the process properly:

    Note that to get the GPIO polarity check to occur, EN has to equal 0, so you would want BOOTCFG to be 0xFFFF36FE.

    Please see if with that setting for BOOTCFG you get the desired behavior.

  • Hello Ralpf,

    In the data sheet, it was stated that Bootloader would not start unless the EN bit is 0, so I tried with EN bit = 0.
    We also confirmed that the value of BOOTCFG is 0xFFFF36FE.
    As a result, the situation did not change, the application started.

    Is not the branch of GPIO's polarity correctly done ?
    How can I check the polarity of the corresponding port / pin of the GPIO while the application is running ?

    Best Regards,

    Kyogo

  • Hello Kyogo,

    Can you describe the steps you are taking to load BOOTCFG, commit to it, and then try to enter bootloader? Including when you assert PB5 high during the process.

    And what do you mean checking the polarity of the port/pin of the GPIO?

    At a very basic level, you could just have the application code check that pin and toggle an LED based on high vs low state...?
  • Hello Ralph,

    When tried again, due to the change of the EN bit,
    I was able to confirm booting of Bootloader.
    The reason why Bootloader did not start even after changing to EN bit = 0 was due to disconnection of the connector that changed GPIO polarity.

    Thank you very much for your support.

    Best Regards,

    Kyogo