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TM4C1230H6PM: problem using TM4C1230H6PM PE3 ADC pin

Part Number: TM4C1230H6PM

Hi

My customer use TM4C1230H6PM ADC pin PE2 (CH1) , PE3(CH0) , PE4(CH9) , PE5(CH8) , four channels are sampled 10 times each, found the PE3 pin problem,

Test 1 : if  ADC PE3 (CH0)  to GND , other Channels ADC date as below, data correct.

CH1:0x7283 CH0:0x0007 CH9:0x6DF0 CH8:0x2A29

CH1:0x7262 CH0:0x0017 CH9:0x6E01 CH8:0x2A08

CH1:0x726D CH0:0x0008 CH9:0x6DFB CH8:0x2A08

CH1:0x7263 CH0:0x0007 CH9:0x6E06 CH8:0x29ED

CH1:0x724B CH0:0x0006 CH9:0x6DF2 CH8:0x2A10

CH1:0x7260 CH0:0x0009 CH9:0x6DFE CH8:0x29F7

CH1:0x725A CH0:0x0003 CH9:0x6DF6 CH8:0x2A2E

CH1:0x7247 CH0:0x0004 CH9:0x6DFA CH8:0x2A22

CH1:0x7276 CH0:0x0007 CH9:0x6DF9 CH8:0x2A1E

CH1:0x7269 CH0:0x000A CH9:0x6DFB CH8:0x2A20

---------------------------------------------------------

2. if PE3(CH0) has voltage, will affect other ADC pins data , the other ADC Channels data no correct, other channel data is increasing

CH1:0xAFF5 CH0:0xAD7A CH9:0xADCC CH8:0xAB0

CH1:0xAFF5 CH0:0xAD86 CH9:0xADCF CH8:0xAB38

CH1:0xAFF5 CH0:0xAD5C CH9:0xADB8 CH8:0xAB14

CH1:0xAFF5 CH0:0xAD64 CH9:0xADB9 CH8:0xAB2B

CH1:0xAFF5 CH0:0xAD52 CH9:0xADB0 CH8:0xAB1E

CH1:0xAFF5 CH0:0xAD7C CH9:0xADCF CH8:0xAB16

CH1:0xAFF5 CH0:0xAD8A CH9:0xADCE CH8:0xAB1B

CH1:0xAFF5 CH0:0xAD6F CH9:0xADBD CH8:0xAB20

CH1:0xAFF5 CH0:0xAD8C CH9:0xADC9 CH8:0xAB31

CH1:0xAFF5 CH0:0xAD80 CH9:0xADCA CH8:0xAB24

---------------------------------------------------------

I attached my customer code in the fallowing. Do you have any suggestions?

Thanks for all

//--------------------------------------------------------------------------------------------------------------------------
static void SetADCFunction(void)
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_2);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_5);
ADCSequenceConfigure(ADC_BASE, 0, ADC_TRIGGER_PROCESSOR, 0);
ADCSequenceStepConfigure(ADC_BASE, 0, 0, ADC_CTL_CH1);// | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC_BASE, 0, 1, ADC_CTL_CH0);// | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC_BASE, 0, 2, ADC_CTL_CH9);// | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceStepConfigure(ADC_BASE, 0, 3, ADC_CTL_CH8 | ADC_CTL_IE | ADC_CTL_END);
ADCSequenceEnable(ADC_BASE, 0);
ADCIntClear(ADC0_BASE, 0);
ADCProcessorTrigger(ADC0_BASE, 0);
}

//--------------------------------------------------------------------------------------------------------------------------
void Measurement(void)
{
static BYTE ADC_Cnt = 0;
static WORD Temp1 = 0;
static WORD Temp2 = 0;
static WORD Temp3 = 0;
static WORD Temp4 = 0;
if(ADCIntStatus(ADC0_BASE, 0, false)) // ADC Done
{
Temp1 += HWREG(ADC_BASE + ADC_O_SSFIFO0);
Temp2 += HWREG(ADC_BASE + ADC_O_SSFIFO0);
Temp3 += HWREG(ADC_BASE + ADC_O_SSFIFO0);
Temp4 += HWREG(ADC_BASE + ADC_O_SSFIFO0);
if(ADC_Cnt < 10) ADC_Cnt++;
else
{
ADC_Data1 = Temp1;
ADC_Data2 = Temp2;
ADC_Data3 = Temp3;
ADC_Data4 = Temp4;

ADC_Cnt = 0;
Temp1 = 0; Temp2 = 0;
Temp3 = 0; Temp3 = 0;
}
ADCIntClear(ADC0_BASE, 0);
ADCProcessorTrigger(ADC0_BASE, 0);
}
}

  • Is it possible (even likely) that PE3 is a 'devil pin' ... and requires 'special treatment?'    (i.e. UNLOCKING!)  

    Such is WELL COVERED (should it prove the issue) via the Forum's (up top) 'Search Box.'    (and a 'keyed read' of the MCU Manual - 'key-wording'  PE3!)

  • Hello Andy,

    First, the code to me looks like it may have errors, or if not, then I am not seeing enough information.

    I notice two things initially, please comment on these:

    1) Where is the call for SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); ? I don't see it in the ADC configuration. Is this done outside of that?

    2) There are multiple references to ADC_BASE, what is "ADC_BASE" I don't believe we have such a define for TM4C.

    Next, I am not sure I really understand the flow of what you are doing. Where is the ADC ISR? Why make the DRM calls for ADC FIFO where you are? The process here does not seem very clean to me.

    Regarding cb1's feedback, I don't believe PE3 has any such issues as was alluded to.
  • Whoops - yet do note that (wiggle room) 'Is it possible' - arrived w/the suggestion to, 'Properly Read/review the description of pin PE3.'      (that pin has arrived here (forum) recently - my (once) photo-mem. may be 'leaking.') 

    Note too - as poster's listing of the ADC results from, 'Three other Channels' appeared 'normal/believable' - 'PE3' (alone) was failing  - does not that  RAISE 'PE3'  to  'Prime Suspect?'    (and 'bedevilment' (aka 'NMI') - is a known & sure plague...)

  • Hi Ralph Jacobi,

         My customer will modify Keil code to TI CCS & Tivaware ver and test again and update late.

    Thanks,

    Andy