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RTOS/TM4C129ENCPDT: Enabling GPIO on port base D

Part Number: TM4C129ENCPDT

Tool/software: TI-RTOS

I'm trying to set up three GPIO pins. Based off the structure of some of the examples included in CCS8 i was able to get two inputs successfully working, using PA2 and PA3. My third input is being run off a seperate port base, PD0.  I've verified that the hardware switches that I am using are correctly sending into pin PD0. I suspect that this problem has something to do with port D having ADC's but I'm not certain. I know that PD[7], as well as PC[3:0] and PE[7], are locked but I don't think that should affect my ability to use PD0. 

/*
* =============================== GPIO ===============================
*/
/* Place into subsections to allow the TI linker to remove items properly */
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_SECTION(GPIOTiva_config, ".const:GPIOTiva_config")
#endif

#include <ti/drivers/GPIO.h>
#include <ti/drivers/gpio/GPIOTiva.h>

/*
* Array of Pin configurations
* NOTE: The order of the pin configurations must coincide with what was
* defined in EK_TM4C129EXL.h
* NOTE: Pins not used for interrupts should be placed at the end of the
* array. Callback entries can be omitted from callbacks array to
* reduce memory usage.
*/
GPIO_PinConfig gpioPinConfigs[] = {
/* Input pins */
/* EK_TM4C129EXL_USR_INP1 */
GPIOTiva_PA_2 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_RISING,
/* EK_TM4C129EXL_USR_INP2 */
GPIOTiva_PA_3 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_RISING,
//EK_TM4C129EXL_GPIO_D0
GPIOTiva_PD_0 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_RISING,


/* Output pins */
/* EK_TM4C129EXL_USR_D1 */
GPIOTiva_PN_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW,
/* EK_TM4C129EXL_USR_D2 */
GPIOTiva_PN_0 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW
};

/*
* Array of callback function pointers
* NOTE: The order of the pin configurations must coincide with what was
* defined in EK_TM4C129EXL.h
* NOTE: Pins not used for interrupts can be omitted from callbacks array to
* reduce memory usage (if placed at end of gpioPinConfigs array).
*/
GPIO_CallbackFxn gpioCallbackFunctions[] = {
NULL, /* EK_TM4C129EXL_USR_IMP1 */
NULL, /* EK_TM4C129EXL_USR_IMP2 */
NULL // Light test gpio on port D0

};

/* The device-specific GPIO_config structure */
const GPIOTiva_Config GPIOTiva_config = {
.pinConfigs = (GPIO_PinConfig *)gpioPinConfigs,
.callbacks = (GPIO_CallbackFxn *)gpioCallbackFunctions,
.numberOfPinConfigs = sizeof(gpioPinConfigs)/sizeof(GPIO_PinConfig),
.numberOfCallbacks = sizeof(gpioCallbackFunctions)/sizeof(GPIO_CallbackFxn),
.intPriority = (~0)
};

/*
* ======== EK_TM4C129EXL_initGPIO ========
*/
void EK_TM4C129EXL_initGPIO(void)
{

GPIO_init();

}

bit from the board header file

typedef enum EK_TM4C129EXL_GPIOName {
EK_TM4C129EXL_USR_IMP1 = 0,
EK_TM4C129EXL_USR_IMP2,
EK_TM4C129EXL_GPIO_D0,
EK_TM4C129EXL_D1,
EK_TM4C129EXL_D2,

EK_TM4C129EXL_GPIOCOUNT
} EK_TM4C129EXL_GPIOName;

and then finally the part in the main where I handle creating the interrupts and tying them to a function

GPIO_setCallback(EK_TM4C129EXL_USR_IMP1, gpioButtonFxn0);
GPIO_enableInt(EK_TM4C129EXL_USR_IMP1);
GPIO_setCallback(EK_TM4C129EXL_USR_IMP2, gpioButtonFxn1);
GPIO_enableInt(EK_TM4C129EXL_USR_IMP2);
GPIO_setCallback(EK_TM4C129EXL_GPIO_D0, gpioButtonFxn2);
GPIO_enableInt(EK_TM4C129EXL_GPIO_D0);

  • Hi Nathan,
    I don't really spot anything wrong with your code. Can you do some experiments? First replace the PD0 with something else like PE0 which is also available on the connector? Will you have any problem with generating interrupt on PE0? PE0 is also muxed with ADC. Next replace PD0 with PF1. PF1 is available on the LaunchPad connector and it is not muxed with ADC. Next swap the order between PA3 and PD0. Will changing the order make PD0 work and PA3 not work? With the above three tests, it will help to understand if the problem is related to the pin being muxed with ADC or not.
  • 1. changing to PE0 did not resolve the issue
    2. changing to PF1 worked
    3. changing the order had no effect on making PD0 work
  • Hi Nathan,

     I cannot reproduce your problem. Below what I did.

     1. Import the TI-RTOS gpiointerrupt_EK_TM4C1294XL_TI example using the CCS resource explorer.

     2. In the EK_TM4C1294XL.c file I made one line change. See below highlighted in red.

     Before:

    GPIO_PinConfig gpioPinConfigs[] = {
    /* Input pins */
    /* EK_TM4C1294XL_USR_SW1 */
    GPIOTiva_PJ_0 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_RISING,
    /* EK_TM4C1294XL_USR_SW2 */
    GPIOTiva_PJ_1 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_RISING,

    /* Output pins */
    /* EK_TM4C1294XL_USR_D1 */
    GPIOTiva_PN_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW,
    /* EK_TM4C1294XL_USR_D2 */
    GPIOTiva_PN_0 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW,
    };

    After:

    GPIO_PinConfig gpioPinConfigs[] = {
    /* Input pins */
    /* EK_TM4C1294XL_USR_SW1 */
    GPIOTiva_PJ_0 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_RISING,
    /* EK_TM4C1294XL_USR_SW2 */
    GPIOTiva_PD_0 | GPIO_CFG_IN_PU | GPIO_CFG_IN_INT_RISING,

    /* Output pins */
    /* EK_TM4C1294XL_USR_D1 */
    GPIOTiva_PN_1 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW,
    /* EK_TM4C1294XL_USR_D2 */
    GPIOTiva_PN_0 | GPIO_CFG_OUT_STD | GPIO_CFG_OUT_STR_HIGH | GPIO_CFG_OUT_LOW,
    };

     3. I place a breakpoint in the gpioButtonFxn1. 

     4. As soon as I provide change in state on the PD0 I see the CPU halted in the breakpoint meaning that the GPIO_PD0 generates an interrupt. 

      Please make the above experiment and see if your are successful with using PD0 and then compare the example code with your code to see if any subtle differences that might cause your PD0 to not work. 

     

  • Charles,
    Doing the above experiment did not resolve the issue. However we received another shipment of dev boards today. I swapped boards out and everything thing worked as it should. it seems that somehow the pins of the port D and E bases got damaged in some way on our first board. I greatly appreciate the assistance and wish you the best
    Nathan