CCS/RM48L952: pbist on sram

rana m

Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN,

Tool/software: Code Composer Studio

hi,

pbistRun(0x08300020U, /* ESRAM Single Port PBIST */ (uint32)PBIST_March13N_SP);

halcogen creates a pbist check on sys_startup.c file for

testing CPU RAM with pbist and the 1st parameter of this function is "RAM Group" which are defined in the device datasheet.

but in "RM48L952 16- and 32-Bit RISC Flash Microcontroller datasheet (Rev. D)" datasheet has nothing like 0x08300020U.
but it has a Table 6-25. PBIST RAM Grouping. where ESRAM1(2) group is 6.

can you please explain what is this 0x08300020U ?

over 7 years ago

0 Sunil Oak over 7 years ago

TI__Mastermind 49120 points

Hello,

The ESRAM on the RM48L952 is broken up into 4x64KB chunks. These can be tested separately and use separate PBIST group numbers for that purpose. The assigned PBIST group numbers are 6, 21, 22 and 28, hence the value of 0x08300020 for selecting all ESRAM groups.

Regards, Sunil

0 rana m over 7 years ago in reply to Sunil Oak

Prodigy 60 points

i'm wondering how the value 0x08300020 coming from 6, 21, 22 and 28 ?
thanks.

0 Sunil Oak over 7 years ago in reply to rana m

TI__Mastermind 49120 points

See the description of the RINFOL and RINFOU registers in the TRM (SPNU503). Having a value of all zeros means that no RAM group has been selected. The RAM groups are numbered starting from 1 (instead of 0). Setting bit 0 to 1 selects RAM group1. So you have to set bits 5, 20, 21 and 27 to select ESRAM groups 6, 21, 22 and 28 respectively.

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CCS/RM48L952: pbist on sram