This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570 Powerdown Modes

When I disable HF_LPO clock source, the Cortex-R4F core current (1,5 V) falls to 5 mA. Is it normal or not?

Also how to wake up Cortex-R4F from powerdown mode by SCI wake up interrupt? Should I manually enable clock sources and clock domains in SCI interrupt handler?

  • Evgeny,

    The HF LPO is used for monitoring the main oscillator clock input. The HF LPO must not be disabled while the oscillator clock monitoring is still enabled.

    If you do want the part to enter a low power mode in which the HF LPO is disabled along with the other sources, then you must disable the oscillator clock monitoring first.

    This is described in section 5.1.31 Clock Test Register, in the TMS57020216 TRM.

    Set bit 24 of the CLKTEST register so that the oscillator monitoring becomes software-controlled. Then the monitoring is disabled as long as bit 25 is cleared.

    Then you can disable the HF LPO and enter the desired low power mode.

    Regards.

  • Thanks, Sunil. This is clear.

    And what about waking up Cortex-R4F from powerdown? Would the "Wakeup" and "PowerDown" clock sources, which I have set up in GCM module, be activated automatically by receiving interrupt (which is also enabled, for example, SCI wake-up interrupt) or should I activate them manually in the interrupt handler, using CSDIS register settings?

  • Evgeny,

    The clock control module wakes up every clock domain after a wake up is received. This causes any clock source selected as the wakeup clock source to automatically get enabled. No manual enabling of clock sources or domains is necessary upon wake up.

    Note that only the clock source selected as source for the clock domains is automatically enabled. For example, if the main oscillator is the wake up clock source for the G/H/VCLK as well as RTIxCLK and VCLKAx domains, then the PLL is not automatically enabled upon wake up and the application needs to manually enable it.

    Regards,

    Sunil