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RM46L852: Need clarification: BA[1] and BA[0] serving as LSBs of the halfword or byte address

Part Number: RM46L852

Hello team,

Hope you are doing well. When you get a chance please see below:

Customer is working on an FPGA coded interface between external devices and the on-board uC RM46L852CZWT. The EMIF will serve this purpose comm port between the Spartan 6 and Hercules. Using TI SPNU515B as my reference, please take a glance at section 17.2.6.1.  I will be using a full 16bit data bus and the full address provided by the Hercules.The whitepaper mentions BA[1] and BA[0]  can serve as LSBs of the halfword or byte address. 

So, do I understand the Address bus is as the following configuration. 

Hercules uC

Spartan

BA[1]

A0

A0

A1

A1

A2

A2

A3

A3

A4

A4

A5

A5

A6

A6

A7

A7

A8

A8

A9

A9

A10

A10

A11

A11

A12

BA[0]/A12

A13

The build-out doesn't seem very intuitive and confusing so I though I'd get clarification from TI.  Please advise - thanks