TM4C129XNCZAD: SPI DMA

James Meyer

I am using the TI TM4C129XNCZADI3 processor. Is there a mechanism to enable the EOM bit (in SPI Control Register One) to identify the last frame while using DMA (with the SSIXFss (FSS Hold Frame) bit set)?

over 7 years ago

0 Bob Crosby over 7 years ago

TI__Guru 72500 points

Hi James,
That is a good question. I played with this several hours yesterday as I thought there was a more elegant way to do this. Unfortunately all I have come up with so far is to set the uDMA transfer for the number of bytes minus 1. Then when you get an interrupt for the DMA transfer complete, you put the last byte in the buffer with SSIAdvDataPutFrameEnd(). Maybe someone else in the community has a better approach.

0 James Meyer over 7 years ago in reply to Bob Crosby

Prodigy 20 points

OK! My solution was the same as yours. I thought there might be a more elegant (as you remarked) way to do it. Thanks!

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TM4C129XNCZAD: SPI DMA