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CCS/TMS570LS3137: IcePick: Error connecting to the target: (Error -231 @ 0x0), how to fix??

Part Number: TMS570LS3137

Tool/software: Code Composer Studio

Getting this error when trying to connect to the processor:

IcePick: Error connecting to the target: (Error -231 @ 0x0) The measured length of the JTAG IR instruction path is invalid. This indicates that an error exists in the link-delay or scan-path. (Emulation package 5.1.507.0)

This happened after I load a new program with the flash/debug setting: Erase Options set on "Entire Flash" instead of "Necessary Sector Only)". I was able to duplicate this issue on another processor and got the same result.  However, I have programmed with that setting before and I was able to reflash/connect to target afterwards.  How do I fix this?

======================================================================================

Ran a Test Connection and the following report was given:::::

[Start: Spectrum Digital XDS560V2 STM USB Emulator]

Execute the command:

%ccs_base%/common/uscif/dbgjtag.exe -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\xxxxx\AppData\Local\TEXASI~1\CCS\
    ti\1\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 560/2xx-class product.
This utility will load the program 'sd560v2u.out'.
Loaded FPGA Image: C:\ti\ccsv6\ccs_base\common\uscif\dtc_top.jbc
The library build date was 'May 21 2014'.
The library build time was '17:40:49'.
The library package version is '5.1.507.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '6' (0x00000006).
The controller has an insertion length of '0' (0x00000000).
The cable+pod has a version number of '8' (0x00000008).
The cable+pod has a capability number of '7423' (0x00001cff).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the Nano-TBC VHDL.
The link is a 560-class second-generation-560 cable.
The software is configured for Nano-TBC VHDL features.
The controller will be software reset via its registers.
The controller has a logic ONE on its EMU[0] input pin.
The controller has a logic ONE on its EMU[1] input pin.
The controller will use falling-edge timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '2' (0x0002).
The utility logic has not previously detected a power-loss.
The utility logic is not currently detecting a power-loss.
Loaded FPGA Image: C:\ti\ccsv6\ccs_base\common\uscif\dtc_top.jbc
E_RPCENV_IO_ERROR(-6) No connection: DTC_IO_Receive::dtc_io
E_RPCENV_IO_ERROR(-6) No connection: DTC_IO_Send::dtc_io
E_RPCENV_IO_ERROR(-6) No connection: DTC_IO_Send::dtc_io

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI's USCIF driver or utilities.

The value is '-252' (0xffffff04).
The title is 'SC_ERR_ECOM_OPERATE'.

The explanation is:
An attempt to operate the USCIF interface via USCIF ECOM has failed.

[End: Spectrum Digital XDS560V2 STM USB Emulator]

  • Hello,

    The problem might be caused by the code you have programmed. The code in the flash makes the CPU enter an exception state repeatedly, and the CPU is not able to enter a debug state.

    Please try this procedure to let CPU enter a debug state:
    1. Open the target configuration window, and launch the selected the configuration
    2. Switch to debug window
    3. Press the reset (nRST) button and hold it
    4. Click “Connect Target” immediately after you release the nRST button
    5. The board should be connected after couple tries
  • Hi QJ,

    Sorry, when you say the reset (nRST) button, are you referring to the development board setup?  I am not currently using the development board. So if I have to ground the nRST signal to the processor, I can wired it up and go from there,

  • Hi,

    yes, I mean nRST reset signal. Is the nRST signal not used on your board? To ensure that an external reset is not arbitrarily generated, TI recommends that an external pull-up resistor is connected to this nRST terminal.