Hi Team,
my Customer configure two ADC channel Ib_C350 and UDC as ADC1 Group1 sample, they found that the voltage change on UDC will impact the AD value of Ib_C350 even when the voltage on Ib_C350 remain the same.
0x00000001U | //Group1 bit 0// Ib_C350
0x00000002U | //Group1 bit 1// UDC , the last channel
For example, if UDC is 0V, Ib_C350 AD value is 1724 when input voltage is 1.397V.
But if UDC is 3.3V, Ib_C350 AD value is 1742 when input voltage remain 1.397V.
but if customer change the configuration as below, adding one ADC sample which is always stable like 3.3V. then the voltage change on UDC would not impact the ADC sample of Ib_C350.
0x00000001U | //Group1 bit 0// Ib_C350
0x00000002U | //Group1 bit 1// UDC
0x00000003U | // 3.3 reference stable voltage , the last channel
That means the voltage on the last sample channel change will impact the first sample channel AD result value.
Could you help to do the analysis and findthe reason why would have this issue? Thanks a lot.
