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TM4C123AE6PM: Wave generator timing issue with TM4C123, SSI

Part Number: TM4C123AE6PM

Hello everyone, 

I need advice regarding some software design. Here is the quick explanation, I have some DAC which generates some analog signal as a response to some input square signal. It generates some small output wave which starts at rising edge and ends at falling edge of the input signal. Communication between MCU and DAC is via SSI interface. I set up GPIO interrupt on the input signal so when rising or falling edge occurs, the system is informed. On rising edge, I start to send via SSI values to the DAC. Sending is done within timer interrupt which runs at 250kHz. The frequency of input signal is max 100Hz, and at that frequency error is not too visible, but at a higher frequency, I see a bigger difference between rising edge and the start of the output wave. Output wave is delayed some time behind input square signal. Here are chunks of code, so maybe if You have some advice of what I am doing wrong, maybe I should generate a signal in the main loop, and not in the timer interrupt? 

void portB_ISR(void)
{
	if(GPIOIntStatus(INPUT_SQUARE_PORT, false)&INPUT_SQUARE_PIN){
		if(GPIOPinRead(INPUT_SQUARE_PORT, INPUT_SQUARE_PIN))//edge was rissing
		{
			flag_falling=1;
			flag_rising=0;
			ui32_timer_cnt=0;
		}
		else //edge was falling
		{
			  flag_rising=1;
			flag_falling=0;
			ui32_outval=PEEK_OUTPUT_VAL;
		}
		GPIOIntClear(INPUT_SQUARE_PORT,INPUT_SQUARE_PIN);
	}
}

void Timer1_ISR(void)
{
	TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT);

	if(flag_ssi_fifo)
	{
		SSIEnable(SSI0_BASE);

		if(flag_TDI){
			flag_count_pickup=0;
			//falling edge in input signal 
			if(flag_falling)
			{
				if(ui32_timer_cnt<BOOST_COUNT){	
						pui32DataTx[0]=ui32_outval;
						SSIDataPut(SSI0_BASE, pui32DataTx[0]);
					ui32_outval=ui32_outval+85;
				}
				else	
				{
					if(ui32_outval>540)
						ui32_outval=ui32_outval-50;
					else if(ui32_outval>416)
						ui32_outval=ui32_outval-10;
					else
					{
						if(ui32_outval==416)
							ui32_outval=370;
						else
							ui32_outval=416;
					}
						pui32DataTx[0]=ui32_outval;//pui32SqrLkp_256[angle];
						SSIDataPut(SSI0_BASE, pui32DataTx[0]);
				}
			}
			//rising edge in input signal -> turn off output signal
			else if(flag_rising)
			{

				ui32_outval=0;
pui32DataTx[0]=ui32_outval;
					SSIDataPut(SSI0_BASE, pui32DataTx[0]);			}
		}
	}
	if(flag_count_pickup)
	{
		ui32_pickup_cnt++;
	}
	ui32_timer_cnt++;
	if(SSIBusy(SSI0_BASE))
		flag_ssi_fifo=0;
	else
		flag_ssi_fifo=1;
}
void SSI_Configuration()
{
	SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0); 
	GPIOPinConfigure(GPIO_PA2_SSI0CLK);
	GPIOPinConfigure(GPIO_PA3_SSI0FSS);
	//GPIOPinConfigure(GPIO_PA4_SSI0RX);  //RX is not used
	GPIOPinConfigure(GPIO_PA5_SSI0TX);
	GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_3 | GPIO_PIN_2);
	SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 16000000, 16);
	SSIEnable(SSI0_BASE);
}

  • Hello Djedjica,

    Djedjica said:
    The frequency of input signal is max 100Hz, and at that frequency error is not too visible, but at a higher frequency, I see a bigger difference between rising edge and the start of the output wave.

    My two questions here would be:

    1) If that's the maximum, why does the performance matter above it?

    2) Then what are the values of the higher frequencies where you seeing noticeable error?

  • Hello Mr. Jacobi, 

    Thank You for replying, I did little switching signal and noticed that only on falling edge response with output signal is late. It is about 100us and it is constant, I was wrong with thinking that it is bigger with frequency growth. For the final product, I believe that this delay is not too important, but I'm just interested if I'm missing something. If I have both edges interrupt on one pin, what is the reason for this delay in response time and what can I do about it. 

  • Hello Djedjica,

    Looking at your code it looks like you have a lot going on inside of your Timer1 ISR. More than I would recommend. You should pull API's like SPIDataPut outside of that ISR. That is probably the source of the lag you are seeing.

    Once you are in an ISR if you don't have a higher priority ISR trigger, then you won't be able to leave that ISR until it concludes, so you may be stuck in a SPIDataPut API when another interrupt occurs and thus introduces lag in the system response time.

    By keeping your Timer1 ISR as lean as possible, just set flags and such, then you can ensure you are servicing it and other ISRs in small windows of time and that should remove any lag in terms of reacting to a changed condition.