CCS/TMS570LS1227: Question about TMS570LS1227 CAN

Hello,

Thank you for your reply!!

I found that setting DAR bit can help stop error transmission.But I have another question now. How can I make sure data in the CAN core buffer was cleared?

Best regards,
Gaobo

Hello,

Thank you for your reply!!
I'm a little confused. I want to know whether the data in the CAN core buffer was cleared because the situation below:
When a transmission failed with DAR bit set, there is still old data in the CAN core buffer , isn't it? And I don't want the old data in the CAN core buffer influence the next transmission.

Best regards,
Gaobo

Hello,

Thanks for your reply!  The responder of the web page you gave me says the message can‘t be stop while the transmit is started. 

The picture below is the datasheet of MC9S12, it shows the function I want to achieve. The function can abort the transmission and clear the buffer. But there isn't the same function I find in the TMS570LS1227 datasheet. 

I not sure if I understand it right?

Best regards,
Gaobo

Hello,

Excuse me. I have two another questions in the datasheet "spnu515c.pdf":
1. Do you know what is ’d bit’ in 27.8.3 Transmission of Messages in Event Driven CAN Communication. Is that mean ’ Message Valid bit’ ?

2. It says "The TxRqst bit in a specific message object can be set/reset by the CPU via the IF1/IF2 Message Interface Registers, or by the Message Handler...". in "27.17.11 Transmission Request Registers ".
I know TxRqst bit can be set via the IF1/IF2 Message Interface Registers /reset by the Message Handler after successful transmission. But how can reset it by the CPU via the IF1/IF2 Message Interface Registers? I try to reset the TxRqst bit in IFMCTL. But it has no work on the DCAN TXRQ X.

Best regards,
Gaobo

I finally figure it out with everyone's help.
Message can be stop by this way:
1. Wait for the busy bit.
2. Set the Control bit and clear the TxRqst/NewDat bit.
3. Clear the TxRqst bit.
4. Select the message box.