TINA/Spice: RM42L432 chip, VIM function problems.

Hello Ningbo,

VIM selftest will not reset the device. But STC generates a CPU reset after completion of the test regardless of pass or fail. Did you use the sys_starup.c generated by HALCoGen?

Do you use TI launchpad or HDK?

The cycle reset chip, It is my own operation.
I am sure the sys_startup.c is generated by HALCoGen. my company is hollysys of Xi'an, use the TI launchpad.
but, My problem is why SL_SelfTest_VIM (VIM_SRAM_PARITY_TEST) return FALSE when RM42L432 power on.

details:
Yesterday, I saw the return FALSE point :
if(((sl_vimParREG->PARFLG & VIM_PAR_ERR_FLG) == 0U) ||
((sl_esmREG->SR1[0U] & GET_ESM_BIT_NUM(ESM_G1ERR_VIM_PARITY_CORRERR)) == 0U))

the sl_vimParREG->PARFLG is 1 when ramRead = (*vimRAMLoc) executed,
but judge condition(FALSE point), the sl_vimParREG->PARFLG is 0.

thank you for your reply.
best regards.

Ningbo Pan.

Hi Ningbo,

I did the VIM selftest using vimParityCheck() in sys_selftest.c, and didn't see the problem. I will use library to do the same test tomorrow. Sorry for late response.

Hello, QJ Wang:

Thank you for waiting, the problem appeared last night, It is still in SL_SelfTest_VIM VIM_SRAM_PARITY_TEST () function returns the value of FALSE,

We print the register and address value, please refer to the following.

PARFLG: 0000, SR1: 8000 0000 0000, ADDERR:fff82008

VIMRAM:00028be8, 0002795c, 00028be8, ffff82012, fff82016

VIM parity:00000000 00000001 00000000 fff82412, fff82416

Looking forward to your reply, thank you.

Best Regards.

Ningbo, Pan

Hello Ningbo,

Is SR1 equal to 0x8000_0000? 31st bit is the CCM-R4 selftest. The VIM parity is 15th bit of ESM group1. The parity value of content (0x00028be8) in 0xFFF82008 is correct (0x0, odd number of 1) . The default polarity is odd.

If the parity bit does not match the calculated parity, a parity error is generated and the VIM stores the address of the error in the ADDERR register. The parity flag error (PARFLG) is set. The PARFLG is 0x0 in your test. Did you clear it?

The PARFLG is cleared by writing 1 to PARFLG.

Hello QJ Wang,

I print three numbers of SR1, SR1[0] is 0x8000, SR1[1] is 0x0000, SR[2] is 0x0000. SR1[0] is equal to 0x8000.

Yes, the problem is the PARFLG is 0x0 in my test, I am not clear it or writing 1 to PARFLG. I do nothing before judge the registers.

One condition of appear the probelem: Try to about 1000~5000 times, one time can appear problem.

Could you help me check the value number once again. thank you very much.

details:
sl_vimParREG->PARFLG: 0000, sl_esmREG->SR1[0]: 8000, sl_esmREG->SR[1]:0000, sl_esmREG[2]:0000, sl_vimParREG->ADDERR:fff82008
VIMRAM(Address:0xFFF82000~0xFFF82020):00028be8, 0002795c, 00028be8, ffff82012, fff82016
VIM parity(Address:0xFFF82400~0xFFF82420):00000000 00000001 00000000 fff82412, fff82416

Best Regards.
Ningbo pan