Other Parts Discussed in Thread: TMS570LS3137
Hello,
While developing our autotest sequence for the DMA block we noticed several undocumented or inconsistent behaviour vs spnu563a document. Can you please provide some clarification/confirmation on the following points. All those points are related to generation of a bus error during DMA transfer, for which our procedure programs on purpose an erroneous DMA transfer, with NMPU and DMA MPU disabled, and targeting a Flash Code area as destination so that to generate an error.
1. We noticed that despite the TRM mentions that BERFLAG is never set in this device, this word is actually updated upon occurence of bus error
Can you clarifiy what is the expected BERFLAG register behaviour on the TMS570LC4357 device ?
2. We noticed that ESM 1.20 is only raised in case the global channel interrupt enable set register is configured to enable the interrupt for the channel generating the aborted transfer. Can you confirm that ESM signaling is conditionned to interrupt enabling, I did not find any part of the document mentioning this.
Thanks for your support.