Dear TI support,
I am trying to understand deeper the three nERROR pins on the TMS570LC4357. Since this microcontroller is always running in lockstep mode, probably only the nERROR and nERROR1 do really play a role, right? However, there are contradictory information in the datasheets (SPNS195C: 2 pins with the same name nERROR are described with 2 different descriptions in Table 4-20 on page 41) and in the Reference Manual (SPNU563A in section 6.5.11.1 on page 324).
Could you explain what is really applicable to the TMS570LC4357? Are all three nERROR/nERROR1/nERROR2 pins available? How do they behave? Are the pins B14 (nERROR) and J2 (nERROR in SPNS195C but nERROR1 in SPNS195A) actually the same signals? How should they be used?
Best regards
Vincent