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STC Timeout

Eugene K
Expert 1685 points

How do I convert STC test cycles from Table 7-1. STC Test Coverage and Duration in TRM into actual value to be loaded into STCTPR?

Eugene

  • 0
    TI__Mastermind 49120 points

    Eugene,

    The table 7-1 shows the CPU self-test coverage achieved and the number of cumulative test cycles required for the corresponding number of test intervals.

    For example, if you ran all the CPU self-test intervals at start-up, then it would take 49698 STC clock cycles. The STC clock is divided down from GCLK, and is configured by the STCCLKDIV register at address 0xFFFFE108.

    The STC clock frequency is limited to 53.33MHz. So if the HCLK frequency is 160MHz, you need to configure STCCLKDIV to 0x02000000 so that the STC clock frequency is 160MHz/3 = 53.33MHz.

    Suppose your VCLK is 80MHz.

    The 49698 cycles at 53.33MHz is equivalent to about 74552 cycles at 80MHz. You can configure the STCTPR register to 75000, so that a TIMEOUT ERROR will be generated by the self-test controller if the CPU self-test does not complete within 75000 VCLK cycles.

    You can similarly adjust the timeout value if you are only running a few self-test intervals at a time.

    Regards,

    Sunil