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CCS: tms5704357 canfd test rx question

Other Parts Discussed in Thread: TCAN4550-Q1

Tool/software: Code Composer Studio

Hello. I'm working on a project right now.
I am currently working on a project to test the TCAN4550-Q1 using the TMS570LC4X.
One of the two boards is TX and the other board is RX. One of them is TX CODE and the other is RX.

But there's a problem here, and I'm going to contact you.
I'll talk about this.

Receiving a signal at rx when it is continuously transmitting at tx, the signal at tx stops, and rx receives the signal and transmits it to spi, confirming that it enters the corresponding rx buffer. No, the signal does not go in at once. I have to do it several times. When receiving the rx signal from the tx signal, it is necessary to send the recognized signal by confirming that rx has been received.

What I did when I sent the signal on rx basis.
Please review once.

I wonder if I need to take another action to get the rx signal.
I want to know how the signal is constant.
I will put the contents and the pictures I have together.

Please teach me a lot.

Register Address Action Value NOTES
Device
Interrupts
0x0820 READ 0x80000082 M_CAN_INT bit is set, so MCAN has an interrupt
IR 0x1050 READ 0x00000010 New message in RX FIFO 1, need to read RX FIFO 1 status to get more information
IR 0x1050 WRITE 0x00000010 Clear the interrupt by writing the bit back to the IR register
RXF0S 0x10A4 READ 0x00040301 There is 1 unread message in the FIFO at index 3
- 0X81C8 - - Based on setup in Table 7, start address for index 3 is: hex(72 * 3) +0x80F0 = 0x81C8
RX FIFO0[3] 0x81C8 READ 0x52345678 Header word #1, XTD is set and ID[28:0] = 0x12345678
RX FIFO0[3] 0x81CC READ 0x01B70000 Header word #2, 7 bytes of data sent with CAN FD and BRS enabled
RX FIFO0[3] 0x81D0 READ 0x44332211 First 4 bytes of data, 0x11 is the first received byte
RX FIFO0[3] 0X81D4 READ 0x00776655 Last 3 bytes of data, 0x77 was the last received byte
RXF0A 0X10B8 WRITE 0x00000003 Write the index of the FIFO index read to acknowledge that it has
been read and clear it for use

* read write spi 

  • Hello Ricky,

    You use one SPI to interface TX board to transmit CAN-FD data to RX board, use another SPI to retrieve the CAN-FD data from TCAN4x FIFO on RX board. You can transmit CAN-FD data successfully, but could not receive the data. Is my understanding correct?
  • Hello QJ Wang

    Each uses the same SPI,

    There are one TX and one RX board on different boards.

    I want to send the TX signal to this board through CANFD to RX BUFFER.

    I wonder if my explanation is understandable.

    Thanks and Regards,
    ricky kim
  • Hello Ricky,

    If the interrupt is enabled, when the new message is received, you will get interrupt, then read the message from the RX FIFO or RX buffer.

    Here is the sequence to enable the interrupt :
    // Set the interrupts we want to enable for MCAN
    TCAN45x0_CAN_Interrupt_Enable_Register TCAN_CAN_IE = {0}; // Remember to initialize to 0, or you'll get random garbage!
    TCAN_CAN_IE.RF0NE = 1; // RX FIFO 0 new message enable
    TCAN_CAN_IE.RF1NE = 1; // RX FIFO 1 new message enable
    MCAN_SetInterruptEnableRegister(&TCAN_CAN_IE); // Enable the appropriate registers

    TCAN45x0_CAN_Interrupt_Line_Select_Register TCAN_CAN_ILS = {0}; //Interrupt Line Select (address = 1058)
    TCAN_CAN_ILS.RF0NL = 1; //Rx FIFO 0 New Message Interrupt uses EINT1
    TCAN_CAN_ILS.RF1NL = 1; //Rx FIFO 1 New Message Interrupt uses EINT1
    MCAN_SetInterruptLineSelectRegister(&TCAN_CAN_ILS);

    TCAN45x0_CAN_Interrupt_Line_Enable_Register TCAN_CAN_ILE = {0}; //Interrupt Line Enable (address = 105C)
    TCAN_CAN_ILE.EINT0 = 0; //Interrupt line m_can_int0 is disabled
    TCAN_CAN_ILE.EINT1 = 1; //Interrupt line m_can_int1 is enabled
    MCAN_SetInterruptLineEnableRegister(&TCAN_CAN_ILE);

    To receive data after interrupt:
    TCAN45x0_CAN_Interrupt_Register MCAN_IR = {0}; // Setup a new MCAN IR object for easy interrupt checking
    MCAN_ReadInterruptRegister(&MCAN_IR); // Read the interrupt register

    if (MCAN_IR.RF0N) { // If a new message in RX FIFO 0
    TCAN45x0_RX_HEADER MsgHeader = {0}; // Initialize to 0 or you'll get garbage
    AHB_WRITE_B_FL_32(M_CAN_IR, MCAN_IR_RF0N); // Clear the interrupt bit to release the INT pin.
    numBytes = MCAN_ReadNextFIFO( RXFIFO0, &MsgHeader, dataPayload); // This will read the next element in the RX FIFO 0