RM46L852: UART tolerance

David Alani

Prodigy 110 points

Part Number: RM46L852
Other Parts Discussed in Thread: HALCOGEN

I have a quick question.

I want to communicate with a servo motor via 1.000.000 baud rate.

Reading the documentation of the motor it says it communicates at 1.000.000 baud rate with 0% tolerance.

Configuring SCI2 to 1.000.000 baud, results in 982143.

UART has tolerance of 3%.

Does this mean that even though my motor communicates with 1.000.000 baud, that if I use 982143 baud there will be no communication problems, information losses and similar?

Thanks,

David

over 6 years ago

0 Miro over 6 years ago

TI__Mastermind 21425 points

Hello David,
SCI baudrate is generated from VCLK1. You could set appropriate frequency to VCLK1 and its prescaler to achieve 0% tolerance. I checked this with 80MHZ VCLK1 and then there is no tolerance with baudrate set to 1 000 000.

Best regards,
MIro

0 David Alani over 6 years ago in reply to Miro

Prodigy 110 points

Thanks for the answer, Miro!

Can you just additionally tell me, what is VCLK1 and where can I configure it?

Thanks,
David

0 Miro over 6 years ago in reply to David Alani

TI__Mastermind 21425 points

Hello,
VCLK is peripheral clock of the device. VCLK1 is the clock source for SCI. All clock could be set using HALCoGen.

Best regards,
Miro

0 David Alani over 6 years ago in reply to Miro

Prodigy 110 points

When I enter the GCM and put 1.75 under VCLK1 clock divider, I end up with errors in system.c and sys_selftest.c.
Unless I put 1.75 I cannot get 1.000.000 baud rate.

How to fix this?

0 Miro over 6 years ago in reply to David Alani

TI__Mastermind 21425 points

Hello,

Here is how Baudrate is calculated:

For example, if you need 1 000 000 for baudrate, this could be achieved by setting VCLK to 80MHz and BAUD (BRS register) to 4.

VCLK could be set to 80 MHz using PLL1 settings. For example: Clock Divider 4, Multiplier 160, Output Divider 2, PLL1 Divider 2.

Hope this helps.

Best regrads,

Miro

0 David Alani over 6 years ago in reply to Miro

Prodigy 110 points

Thank you for the detailed answer, Miro!

I have only tried to change the divider of the VCLK in GCM and couldn't get your results. I had no clue that I could work around with it in PLL1 tab, untill you've just noted.

Thanks again!

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RM46L852: UART tolerance