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TM4C123GH6PZ: Attempt to write NULL pointer is silently ignored

Part Number: TM4C123GH6PZ
Other Parts Discussed in Thread: TM4C129EKCPDT

Hi,

When I run the following code what I expect is that the attempt to write to a null pointer would result in a hard fault. Instead what we've found is that the instruction is silently ignored. This seems to contradict what is shown in the datasheet:

"Note: Within the memory map, attempts to read or write addresses in reserved spaces result in
a bus fault. In addition, attempts to write addresses in the flash range also result in a bus
fault."

uint32_t var = 0xDEADBEEF;
	
uint32_t * pointer_to_var = &var;
uint32_t * pointer_to_null = NULL;

*pointer_to_var = 0;
*pointer_to_null = 0;

Can anyone shed some light on this? Have we somehow disabled faults for this particular error or is this even possible?

Thanks,

Eric.

  • I see the initialization of your null pointer, but I don't see the write to location 0 in your code.
  • Hi Bob,

    line 303 in the screenshot tries to write to the NULL pointer:

    *pointer_to_null = 0;

  • Sorry, I must be going blind.

    I am able to reproduce your results, and I see the statement on page 92 of the datasheet. At this point, all I can say is that the MPU is not enabled. You can cause an abort on a write to flash memory by programming the MPU and designating that region as read only. I will look into this further. At this point I suspect the statement in the datasheet is in error and should be corrected.

  • Hi Bob,

    I tried similar code on both the TM4C123 and the TM4C129EKCPDT.

    int main() {	
    	int * pointer_to_null = 0;
    	*pointer_to_null = 1;
    	
    	while(1);
    }
    
    void HardFault_Handler(void) {
    	while(1) {
    		__asm("BKPT 0");
    	}
    }

    The TM4C129 hit the breakpoint in the hard fault as expected. The TM4C123 remained in the while loop in main(). Both datasheets have the same note in the "memory model" section about generating bus faults. We can definitely use the MPU to trap this error on the TM4C123 but I would be very interested to know what the difference is between these two devices.

  • Hi Bob,

    Have you had a chance to look into this further? I have tried the MPU and know that it will be a viable solution but I can't shake the feeling that something is very wrong. Maybe the issue is the documentation but if it's the chip or our configuration of the chip I would really like to know if there's a workaround.

    Thanks,
    Eric.
  • The default memory map protection for the Cortex M4F is configured at the time of device design. The TM4C123 was designed first. It looks like the configuration for the Flash memory range was done incorrectly and does not flag writes. The TM4C129 parts were done later and done correctly. I will be submitting this as an advisory in the TM4C123 Errata Document.