I am attempting to setup a TM4C129ENCPDT with a AD7793 3chan ADC chip via SPI. The design calls for using two of these chips on a bus structure where I would control the chip select lines outside of the SPI CS line to indicate which chip I am talking to. Currently I can see on a scope that I am sending data, and depending on what I send I can see information arrive on the RX pin. I am however unable to get data into the TIVA chip.
The AD7793 requires a command message sent to the chip before it will respond with a value from its data register. It looks similar to a MICORWIRE format, but claims to be able to be used with SPI, MICORWIRE, QSPI and 3wire formats. I've tried using multiple formats and both the HWREG commands and the spi.h commands but am unable to figure out the correct settings to read meaning full information. I have been unable to even read the ID register. I've attached the setup and data get functions that I wrote to communicate with this chip. If you have any idea, or have worked with this ADC chip before please let me know what I am missing.
Thank,
~ Andrew
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A write of 0x60 to the Com Register should provide me a response of 0x0B.
The bool ctrlCS just allows me to set or not set the CS line depending on what I am trying to do. For the ID I am setting the CS in the spiDataGet Function.
uint8_t SpiADC::spiDataGet(uint8_t reg, uint8_t* data, uint8_t data_size, bool ctrlCS)
{
//Write Reg to SPI PORT
uint32_t data32[5] = {0x00,0x00,0x00,0x00,0x00};
uint32_t data32_size = 5;
if(ctrlCS)
CS_LOW();
SSIDataPut(SSI0_BASE,0x60);
SSIDataGet(SSI0_BASE,data32);
while(SSIBusy(SSI0_BASE));
if(ctrlCS)
CS_HIGH();
for(int i = 0;i<data32_size;i++)
{
data[i] = data32[i];//static_cast<uint8_t>(*data32ptr);
}
data_size = data32_size;
return data_size;
}
static void init_spi()
{
//********************
/// SSI0
//********************
// set up SSI peripheral
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
while(!SysCtlPeripheralReady(SYSCTL_PERIPH_SSI0));
// set up the GPIO A block
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOA));
// set up the GPIO N block
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPION));
// Configure the appropriate pins to be SSI instead of GPIO.
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0XDAT0); //SSIOTX
GPIOPinConfigure(GPIO_PA5_SSI0XDAT1); //SSIORX
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 |
GPIO_PIN_4 | GPIO_PIN_5);
// Configure the appropriate pins for the independent SSI lines
GPIOPinTypeGPIOOutput(GPIO_PORTN_BASE, GPIO_PIN_0); //24V CS (DEV BOARD 5V)
GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_0,GPIO_PIN_0); //Set High
GPIOPinTypeGPIOOutput(GPIO_PORTN_BASE, GPIO_PIN_1); //5V CS (DEV BOARD 24V)
GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_1,GPIO_PIN_1); //Set High
SSIClockSourceSet(SSI0_BASE,SSI_CLOCK_SYSTEM);
SSIConfigSetExpClk(SSI0_BASE, // SSI module base address
g_SysClock, // 120Mhz Sys Clok
SSI_FRF_MOTO_MODE_3, // data transfer protocol (CPOL = 1 | CPHA = 1) MODE 3
SSI_MODE_MASTER, // mode of operation
2000000, // clock rate (for transfers?) FSSI > = 2* bitrate (2Mhz min)
8// num bits transferred per frame
);
SSIAdvModeSet(SSI0_BASE, SSI_ADV_MODE_LEGACY); //SET SSI to Legacy
// Enable the SSI0 module.
SSIEnable(SSI0_BASE);
}
