Tool/software: Code Composer Studio
Hi
I need some help with the configuration of the DMA together with the ADC.
I have a 2 PWM signal (for motor control) with 20kHz. And I need to sample the current for the whole cycle..
For that I want to sample 64 values with a sample rate of 1.28 MSPS (that needs 49us).
So my idea is to start the ADC always triggered to sample 4 values transfer the samples with the DMA burst request into a buffer while the adc samples the next 4 values.
And inside my PWM interrupt I'll start the next DMA request (primary or alternate Structure)
For that I configured the ADC sequencer 0 with 4 samples (burst request at FIFO half full).
ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 0, ADC_CTL_CH18 | ADC_CTL_IE);
ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 1, ADC_CTL_CH18);
ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 2, ADC_CTL_CH18);
ROM_ADCSequenceStepConfigure(ADC0_BASE, 0, 3, ADC_CTL_CH18 | ADC_CTL_END);
The same with ADC1 and channel 19.
The ADC ist working - I tested it before I configured the DMA.
The DMA is configured like that:
ROM_uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC0, UDMA_PRI_SELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK);
ROM_uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC0, UDMA_ALT_SELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK);
ROM_uDMAChannelAttributeDisable(UDMA_SEC_CHANNEL_ADC10, UDMA_PRI_SELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK);
ROM_uDMAChannelAttributeDisable(UDMA_SEC_CHANNEL_ADC10, UDMA_ALT_SELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK);
ROM_uDMAChannelAssign(UDMA_CH14_ADC0_0);
ROM_uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_4);
ROM_uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT, UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_4);
ROM_uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG, (void *)(ADC0_BASE + ADC_SEQ + ADC_SSFIFO), (void *)u16Adc0SamplesA, 64);
ROM_uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG, (void *)(ADC0_BASE + ADC_SEQ + ADC_SSFIFO), (void *)u16Adc0SamplesB, 64);
ROM_uDMAChannelAssign(UDMA_CH24_ADC1_0);
ROM_uDMAChannelControlSet(UDMA_SEC_CHANNEL_ADC10 | UDMA_PRI_SELECT, UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_4);
ROM_uDMAChannelControlSet(UDMA_SEC_CHANNEL_ADC10 | UDMA_ALT_SELECT, UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 | UDMA_ARB_4);
ROM_uDMAChannelTransferSet(UDMA_SEC_CHANNEL_ADC10 | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG, (void *)(ADC1_BASE + ADC_SEQ + ADC_SSFIFO), (void *)u16Adc1SamplesA, 64);
ROM_uDMAChannelTransferSet(UDMA_SEC_CHANNEL_ADC10 | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG, (void *)(ADC1_BASE + ADC_SEQ + ADC_SSFIFO), (void *)u16Adc1SamplesB, 64);
uDMAChannelEnable(UDMA_CHANNEL_ADC0);
uDMAChannelEnable(UDMA_SEC_CHANNEL_ADC10);
ADCSequenceDMAEnable(ADC0_BASE, 0);
ADCSequenceDMAEnable(ADC1_BASE, 0);
After start the uC I see 64 values in the buffers (u16Adc0SamplesA etc.) so it seems the DMA is working at least once.
But how could I retrigger the DMA either the primary or the alternate structure inside my PWM interrupt?
That is what I tried but not work.
if(((HWREG(UDMA_ENASET) >> UDMA_CHANNEL_ADC0) & 0x01) == 0) {
if (uDMAChannelAttributeGet(UDMA_CHANNEL_ADC0) & UDMA_ATTR_ALTSELECT) {
ROM_uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG,
(void *)(ADC0_BASE + ADC_SEQ + ADC_SSFIFO), (void *)u16Adc0SamplesA, 64);
}
else {
ROM_uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG,
(void *)(ADC0_BASE + ADC_SEQ + ADC_SSFIFO), (void *)u16Adc0SamplesB, 64);
}
uDMAChannelEnable(UDMA_CHANNEL_ADC0);
}
A breakpoint a the UDMA_ALT_SELECT line is reached but nothing happens.
Thanks for you help.
Kind regards
Rene
