Other Parts Discussed in Thread: HALCOGEN
Hi,
I'm using UART boot-loader for TMS570LC4357. Normal Application code (HALCoGen) is working fine, when i'm flashing through boot-loader. Now I'm using uC/OS-III and I created a simple task LED blinking. If I tried with uC/OS-III flashing through boot-loader, Its executing my task upto LED trun ON, next its execute OSTimeDlyHMSM() for delay and immediately got struggle in some where, its not blinking. please see below of "HL_sys_intvecs.asm" and "sys_link.cmd " of my bootloader and uC/OS-III. Please give a solution for this?
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; This is my Boot-Loader "HL_sys_intvecs.asm" File
.sect ".intvecs"
.arm
;-------------------------------------------------------------------------------
; import reference for interrupt routines
.ref _c_int00
;-------------------------------------------------------------------------------
; interrupt vectors
b _c_int00
b #0x2000F8
b #0x2000F8
b #0x2000F8
b #0x2000F8
b #0x2000F8
b #0x2000F8
b #0x2000F8
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//This is my Boot-Loader "sys_link.cmd " File
--retain="*(.intvecs)"
MEMORY
{
VECTORS (X) : origin=0x00000000 length=0x00000020
FLASH0 (RX) : origin=0x00000020 length=0x001FFFE0
FLASH1 (RX) : origin=0x00200120 length=0x001FFFDF
STACKS (RW) : origin=0x08000000 length=0x00001500
RAM (RW) : origin=0x08001500 length=0x0007EB00
}
SECTIONS
{
.intvecs : {} > VECTORS
.text align(32) : {} > FLASH0
.const align(32) : {} > FLASH0
.cinit align(32) : {} > FLASH0
.pinit align(32) : {} > FLASH0
.bss : {} > RAM
.data : {} > RAM
.sysmem : {} > RAM
}
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; This is my uC/OS-III " HL_sys_intvecs.asm" file
.sect ".intvecs"
.arm
;-------------------------------------------------------------------------------
; import reference for interrupt routines
.ref _c_int00
.ref OS_CPU_ARM_ExceptUndefInstrHndlr
.ref OS_CPU_ARM_ExceptSwiHndlr
.ref OS_CPU_ARM_ExceptPrefetchAbortHndlr
.ref OS_CPU_ARM_ExceptDataAbortHndlr
.ref OS_CPU_ARM_ExceptIrqHndlr
.ref phantomInterrupt
.def resetEntry
;-------------------------------------------------------------------------------
; interrupt vectors
resetEntry
b _c_int00
b OS_CPU_ARM_ExceptUndefInstrHndlr
b OS_CPU_ARM_ExceptSwiHndlr
b OS_CPU_ARM_ExceptPrefetchAbortHndlr
b OS_CPU_ARM_ExceptDataAbortHndlr
b phantomInterrupt
b OS_CPU_ARM_ExceptIrqHndlr
ldr pc,[pc,#-0x1b0]
;-------------------------------------------------------------------------------
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//This is my uC/OS-III " sys_link.cmd " File
--retain="*(.intvecs)"
MEMORY
{
VECTORS (X) : origin=0x00200100 length=0x00000020
FLASH1 (RX) : origin=0x00200120 length=0x001FFFDF
STACKS (RW) : origin=0x08000000 length=0x00001500
RAM (RW) : origin=0x08001500 length=0x0007eb00
}
SECTIONS
{
.intvecs : {} > VECTORS
.text align(32) : {} > FLASH1
.const align(32) : {} > FLASH1
.cinit align(32) : {} > FLASH1
.pinit align(32) : {} > FLASH1
.bss : {} > RAM
.data : {} > RAM
.sysmem : {} > RAM
FEE_TEXT_SECTION : {} > FLASH1
FEE_CONST_SECTION : {} > FLASH1
FEE_DATA_SECTION : {} > RAM
}
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Regards
-Arun
(arunprakash.m@mindteck.com)