Hello,
In the RM48 TRM (spnu503c) page 188 it is explained that in the PCR control registers there is 1 bit for each quadrant for PS0-PS7 ...
It seems to me like the amount of quadrants used relates to the frame size (memory) of the peripheral.
All 4 quadrants means 1kByte memory
2 quadrants means 512 Bytes
1 quadrant means 256 Bytes.
When I look at page 103 I find that both MibSPI3 and SPI4 belong to PS[1]. Each has 512 Bytes of memory.
It seems to me then that they each use 2 quadrants. From page 188 I conclude that one must use quadrant 0&1 and therefore can be controlled by the Q0 bit. The other must use quadrant 2&3 and must be controlled by the Q2 bit.
Let's say I want to powerdown SPI4 and keep MibSPI5, how must I configure PSPWRDWNSET0?
PS[7-0]QUAD[3-0]PWRDWNSET = 0x00000010;
or
PS[7-0]QUAD[3-0]PWRDWNSET = 0x00000040;
?
I am assuming it has a relation to the frame addresses.