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TM4C1294NCPDT: EPI in General-Purpose Mode

Livio Brunner
Prodigy 80 points
Part Number: TM4C1294NCPDT

Hi Everyone

I would like to use the EPI of the TM4C1294NCPDT in General-Purpose Mode.
I am confused why the iRDY Input Signal for stalling reads, is not implemented anymore (as it was on the Stellaris LM3S9D90).

On the Data Sheet of the TM4C1294NCPDT on page 848 it says;

The configuration allows for choice of an output clock (free-running or gated), a framing signal (with
frame size), a ready input (to stretch transactions), an address (of varying sizes), and data (of varying
sizes).

Question: Is that an error in the Datsheet?, How can use an  Input Signal for stalling reads?

Kind Regards


  • 0
    TI__Guru**** 191886 points
    Hi,
    Yes, you are correct that iRDY is not implemented in TM4C129 for the General Purpose mode. However, the iRDY is mapped to EPIS032 in the Host mode if the RDYEN bit is enabled.
  • 0 in reply to Charles Tsai
    Prodigy 80 points
    Hi Charles

    So, is there no option in the General Purpose Mode to delay/stall a read cycle?
    To connect FPGA's it is meant to use the General Purpose Mode...
    How can I tell the EPI that the data will arrive one or two clock cycles delayed?
    (The delay/clock cycles is not always the same, this depends on the FPGA's state)

    Kind Regards Livio
  • 0 in reply to Livio Brunner
    TI__Guru**** 191886 points

    Hi Livio,

     Unfortunately, as I have mentioned in the last reply, per the TM4C129 datasheet the iRDY is not available in the General Purpose mode.  I understand that the iRDY signal is available and documented in the LM3S9D90 where it is mapped to the EPI0S27 pin.  Please refer to the "Transitioning from Stellaris LM3S to Tiva C Series MCU" app note http://www.ti.com/lit/an/spma049a/spma049a.pdf for details about the differences between the two MCU. Specifically about the EPI where it mentions the iRDY is not supported in general purpose mode. 

  • 0 in reply to Charles Tsai
    TI__Guru**** 191886 points
    Hi Livio,
    Hi Jon,
    I didn't hear from you. I assume the iRDY unavailability in general purpose mode is clear to you now . I will close the thread for now. If you have new questions please open a new thread or if you have some comment you can reply back to this thread.
  • 0 in reply to Charles Tsai
    Prodigy 80 points
    Hi Charles

    Yes, that is clar now. Thanks for the additional dokumentation "Transitioning from Stellaris LM3S to Tiva C Series MCU".

    I am still wondering: Why is it suggested (in the MCU Datasheet) to use the general purpose mode for FPGA's connections, when there is no feedback/ready/waitrequest signal? Since the two most common FPGA's Bus systems (Avalon from Intel and AXI from Xilinx) are dependent on this signal.

    Kinde regards
    Livio
  • 0 in reply to Livio Brunner
    TI__Guru**** 191886 points
    Hi Livio,
    I can't really tell you why iRDY was removed as I don't have the history at the decision making when the device was developed. Is it possible for you to use the host-bus mode where the iRDY can be used and the host-bus mode provides similar device compatibility options as PIC, ATmega, 8051 and others.