TM4C1294KCPDT: To get a continuous SSIxClk

Hi Takashi,
I will suggest you use the DIVSCLK instead which is a free running clock that can base on different clock sources. Please refer to the TM4C129 datasheet for details. See below.

Optional Clock Output Signal (DIVSCLK)
An optional clock output, DIVSCLK, is provided which can be used as a clock source to an external
device but bears no timing relationship to other signals. Note that this signal is not synchronized to
the System Clock. By programming the SRC field in the Divisor and Source Clock Configuration
(DIVSCLK) register, the following clock outputs may be selected for DIVSCLK:
■ System Clock
■ PIOSC
■ MOSC
The DIV field in the DIVSCLK register controls the divided output clock frequency. The DIVSCLK
signal is selected as an alternate function of a GPIO signal and has the same inherit electrical
characteristics of a GPIO as listed in “Electrical Characteristics” on page 1818.