Part Number: TM4C1294NCPDT
Here's a note from the data sheet, about the EMAC clock (used in 1588 PTP). It explains that the PPS interrupt from the EMAC isn't uniform, when the EMAC is in digital rollover mode. Is there an explanation, or it just the way it is?
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"In the digital rollover mode, the EN0PPS signal frequency is an average number. The actual clock is of different frequency that gets synchronized every second. For example:
When PPSCTRL =0x1, EN0PPS (1 Hz) has a low period of 537 ms and a high period of 463 ms.
When PPSCTRL = 0x2, EN0PPS (2 Hz) is a sequence of:
■ One clock of 50 percent duty cycle and 537 ms period
■ Second clock of 463 ms period (268 ms low and 195 ms high)
When PPSCTRL = 0x3, EN0PPS (4 Hz) is a sequence of:
■ Three clocks of 50 percent duty cycle and 268 ms period
■ Fourth clock of 195 ms period (134 ms low and 61 ms high)
This signaling behavior is because of the non-linear toggling of bits in the digital rollover mode in the Ethernet MAC System Time - Nanoseconds (EMACTIMNANO) register.
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First - can anyone explain this? I mean, not just repeat the caution, but actually explain how the register behavior leads to this effect. It seems odd.
I'll use binary or command mode, but it would still be nice to understand.
