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TMS570LC4357: Clock Detection LPO HF

Lars Guenther
Intellectual 675 points
Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi all,

I have a question about the TI documentation. I used the document spnu563.pdf (Technical Reference Manual for TMS570LC4357 Processor), Version May 2014.

Chapter 14.4.1 Clock Detect
The LPO HF clock frequency is typically near 9.6MHz, but ranges from 5.5MHz to 19.5MHz.

What does it mean a range from 5.5MHz to 19.5MHz ? Do you mean the LPO HF clock should ajust in HalCoGen between 5.5MHz - 19.5MHz ? Or do you mean if the LPO HF clock is set in HalCoGen to 9.6MHz it could be in a range from 5.5MHZ to 19.5Hz, may be for temperature reasons.

And is it possible to read out the actual LPO HF clock frequency ?

Best regards

Lars

  • 0
    TI__Mastermind 49120 points
    Hi Lars,

    The Low-Power-Oscillator (LPO) is an internal macro that provides two separate clock sources for use in monitoring other critical clock sources/domains. The LPO clock sources are not very accurate and vary significantly, mainly due to allowed tolerance of process parameters. The high-frequency LPO source (HF LPO) varies from 5.5MHz up to 19.5MHz. This value can then be trimmed by the application using the HFTRIM bitfield of the LPO/Clock Monitor Control Register.

    The start-up code generated by HALCoGen includes a routine to measure and then trim the HF LPO frequency such that it is as close to 10MHz as possible (but not over). You can measure the HF LPO frequency using the dual-clock comparator by choosing the main oscillator as the reference clock.

    Regards,
    Sunil
  • 0 in reply to Sunil Oak
    Intellectual 675 points

    Hi,

    that is exact what I want to do. Check the HF LPO with the DCC functionality.

    But I have a Problem with the Parameter "Allowed +/.% of Clock Drift" in HalCOGen. What kind of value should I choose.

    Because the SW must run on hundreds of Systems over the complete temperature range (-40°C - 125°C) without a failure on the DCC functionality.

    Best regrads

    Lars 

  • 0 in reply to Lars Guenther
    TI__Mastermind 49120 points
    Hi Lars,

    Please refer to this application note (www.ti.com/.../spna211.pdf) about using DCC to monitor the PLL output clock. You can modify the clock source selection choice to monitor the HF LPO instead.

    Regards,
    Sunil