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TMS570LS1224: Problem with wakeup from RTI after doze

Part Number: TMS570LS1224
Other Parts Discussed in Thread: HALCOGEN

We need to lower the power consumption of our TMS570LS1224.

Currently we're testing the doze() mode but we don't seem to wakeup on the RTI Compare zero interrupt.

void Doze()
{

    // enable wakeup interrupts
    vimREG->WAKEMASKSET0 = 0x06;
    vimREG->WAKEMASKSET1 = 0x0;
    vimREG->WAKEMASKSET2 = 0x0;
    vimREG->WAKEMASKSET3 = 0x0;



    flashWREG->FBAC = ((flashWREG->FBAC & 0xFFFF00FF) | 0x00001000 );
    flashWREG->FPAC2 = 0;
    flashWREG->FBFALLBACK = 0;
    flashWREG->FPAC1 = ( flashWREG->FPAC1 & 0xFFFFFFFE);

    systemREG1->GHVSRC   = 0x00000000;
    systemREG1->RCLKSRC  = 0x00000000;
    systemREG1->VCLKASRC = 0x00000000;


    systemREG1->CSDIS = 0xCE;   //e2e.ti.com/.../2363875

    /** - Wait for until clocks are locked */
    while ((systemREG1->CSVSTAT & ((systemREG1->CSDIS ^ 0xFF) & 0xFF)) != ((systemREG1->CSDIS ^ 0xFF) & 0xFF));


    /** - Disable / Enable clock domain */
    systemREG1->CDDIS = 0x0 //RTICLK is enabled for wakeup
    | (uint32)((uint32)1U << 0U ) /* GCLKOFF */
    | (uint32)((uint32)1U << 1U ) /* HCLK OFF */
    | (uint32)((uint32)1U << 2U ) /* VCLKP OFF */
    | (uint32)((uint32)1U << 3U ) /* VCLK2 OFF */
    | (uint32)((uint32)1U << 4U ) /* AVCLK 1 OFF */
    | (uint32)((uint32)1U << 5U ) /* AVCLK 2 OFF */
    | (uint32)((uint32)1U << 8U ) /* VCLK3 OFF */
    | (uint32)((uint32)0U << 9U ) /* VCLK4 OFF */
    | (uint32)((uint32)1U << 10U) /* AVCLK 3 OFF */
    | (uint32)((uint32)1U << 11U); /* AVCLK 4 OFF */  //GJA TODO try keeping pwm alive

    asm( " NOP");
    asm( " NOP");
    asm( " NOP");

    // Execute ARM instructions with IDLE cycles to trigger CPU clock stoppage
    asm( " WFI");
    asm( " NOP");
    asm( " b #-8");
    asm( " NOP");
    asm( " NOP");
    asm( " NOP");
    asm( " NOP");

}

After the doze call we try to wakeup using:

//wakeup again

                        systemREG1->VRCTL = 0x00;

                        /** - Start clock source lock */
                        systemREG1->CSDIS =  0x00000000U
                                            | 0x00000000U
                                            | 0x00000008U
                                            | 0x00000004U
                                            | 0x00000000U;

                        /** - Wait for until clocks are locked */
                        while ((systemREG1->CSVSTAT & ((systemREG1->CSDIS ^ 0xFF) & 0xFF)) != ((systemREG1->CSDIS ^ 0xFF) & 0xFF));

                        /** - Setup GCLK, HCLK and VCLK clock source for normal operation, power down mode and after wakeup */
                        systemREG1->GHVSRC = (SYS_OSC << 24U)
                                           | (SYS_OSC << 16U)
                                           |  SYS_PLL1;

                        /** - Setup RTICLK1 clock */
                        systemREG1->RCLKSRC  = (1U << 8U)
                                            |  SYS_VCLK;

                        /** - Setup asynchronous peripheral clock sources for AVCLK1 and AVCLK2 */
                        systemREG1->VCLKASRC  = SYS_VCLK;


                        flashWREG->FBAC = 0x00000000U
                            |(uint32)((uint32)15U<< 8U) //BAGP
                            |(uint32)((uint32)15U); //VREADST

                        /** - Setup flash bank power modes */
                        flashWREG->FBFALLBACK = 0x00000000U
                        | (uint32)((uint32)SYS_ACTIVE<< 14U) /* BANK 7 */
                        | (uint32)((uint32)SYS_ACTIVE << 2U) /* BANK 1 */
                        | (uint32)((uint32)SYS_ACTIVE << 0U); /* BANK 0 */

Any suggestions are very welcome.