Is the concern and need to back up and restore SRAM before SL_SRAM_TEST as described in this post:
https://e2e.ti.com/support/microcontrollers/hercules/f/312/p/601225/2215521
still applicable for STL version 2.40?
Was the method suggested by Mark below deemed necessary and complete or in version 2.40 the context backup and restore happens automatically in the library?
From Mark:
Insert a wrapper exception handler around the IRQ / FIQ and intercept the ESM high and low priority interrupt handlers, and in the wrapper:
if test == SRAM_PAR_ADDR_CTRL_SELF_TEST then
ESM SR2 = 0x00000400
VIM IRQ INTREQ0 = 0x00000001
Before each call to ‘SL_SelfTest_SRAM’:
Save TCRAM Even & Odd RAMCTRL
Save TCRAM Even & Odd RAMTHRESH
After each call to ‘SL_SelfTest_SRAM’:
Restore TCRAM Even & Odd RAMCTRL
Restore TCRAM Even & Odd RAMTHRESH
Read to unlock TCRAM Even & Odd RAMPERADDR, RAMSERRADDR, RAMUERRADDR
Clear ESM SR3 0x00000028
Clear and ERROR pin and reset the key to normal
Not all steps are required for each test, but that are all required to get all tests to report a pass.