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RM48L952: SL_SelfTest_STC(STC_COMPARE_SELFCHECK) Fail bit is being set after the test.

Shazan Lefebvre
Prodigy 30 points
Part Number: RM48L952

Hi,

I am trying to execute the Compare Selfcheck on TI RM48L952 with the following parameters.

// Make sure that the CPU self-test controller can actually detect a fault inside CPU
stcSelfTestConfig.stcClockDiv = 2;              // STC Clock divider = 2
stcSelfTestConfig.intervalCount = 1;            // One interval only
stcSelfTestConfig.restartInterval0 = TRUE;      // Start from interval 0
stcSelfTestConfig.timeoutCounter = 0xFFFFFFFFU; // Timeout counter

//_SL_HoldNClear_nError();                                                  // Wait, reset the nError pin and ensure it properly goes to 1
SL_SelfTest_STC(STC_COMPARE_SELFCHECK, true, &stcSelfTestConfig);     // STC Self check diagnostic then reset.

When the mcu reboots, the result is always sl_stcREG->STCGSTAT == 0x00000003U. (DONE and FAIL bits are set)

Any idea why?

Thanks

  • 0
    TI__Guru**** 196776 points
    Hello Shazan,

    The register STCGSTAT should get reset to its default value (0x00) with power-on reset assertion. This register gets cleared to its default value when the STC_ENA key is written from a disabled state to enabled state.

    Please add a breakpoint before doing the STC selft est, then check the value of STCGSTAT.
  • 0 in reply to QJ Wang
    Prodigy 30 points

    Hello QJ,

    I found why the FAIL bit was always set.

    The description of STC_COMPARE_SELFCHECK test is: STC self check diagnostic.

    Actually this test inject a fault by setting FAULT_INS in STCSCSCR. This is why after reset the FAIL bit is set.

    Thanks and regards