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TMS570LS0432: CPU self-test,pbist test ad-test ,flash-test

whong zhao
Genius 4190 points

Part Number: TMS570LS0432

Excuse me,

HI 

 when the cpu is doing self-test,or flash test and so on, do the interrupt program can be break flash test?when the interrupt is over,the self-test doesnot have an impact

  • 0
    TI__Mastermind 21425 points
    Hello,
    During STC tests (CPU Self-Test Controller tests), CPU core tested is completely isolated from the rest of the system and interrupts are not served. STC generates a CPU reset after completion of the test regardless of pass or fail. User have to save CPU contents and reload after reset. It is not recommended to run STC on a periodic basis.
    PBIST is designed to run at startup. You can run PBIST in runtime but PBIST test is a destructive test where the selected RAM. Your application data will be lost due to the test unless you first save the context and later restore them after the test.

    Best regards,
    Miro
  • 0 in reply to Miro
    Genius 4190 points

    Thank you

     hi Miro 

    According to what you mean, the STC self-test and the PBIST self-test are executed at startup. I understand it.
    In order to ensure the security of the system, a self-test at runtime is required, and this self-test cannot affect the performance of the system at runtime, so that I need to self-check what function, there are interruption in the system, when self-test is running,interruption unaffected.

  • 0 in reply to Miro
    Genius 4190 points

    I see this ..  do they can run when the system is running

    retVal = Reg_Read_Compare(CCMR4,COMPARE);
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);


    retVal = Reg_Read_Compare(EFC,COMPARE);
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);

    retVal = Reg_Read_Compare(PBIST,COMPARE);
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);


    retVal = Reg_Read_Compare(STC,COMPARE);
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);


    retVal = Reg_Read_Compare(ESM,COMPARE); //by sun
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);

    retVal = Reg_Read_Compare(DCC1,COMPARE);
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);

    retVal = Reg_Read_Compare(TCMFLASH,COMPARE); //by sun
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);

    retVal = Reg_Read_Compare(SRAM,COMPARE);
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);

    #endif
    retVal = Reg_Read_Compare(VIM,COMPARE);
    INCREMENT_PASS_FAIL_COUNTER(ST_PASS, retVal);

    retVal = SL_SelfTest_FEE(FEE_ECC_DATA_CORR_MODE, TRUE, &failInfoFlash);
    INCREMENT_PASS_FAIL_COUNTER(failInfoFlash, retVal);

    /* Run 1 bit selftest */
    retVal = SL_SelfTest_FEE(FEE_ECC_TEST_MODE_1BIT, TRUE, &failInfoFlash);
    INCREMENT_PASS_FAIL_COUNTER(failInfoFlash, retVal);
    #if 0
    /* Run 2 bit selftest */
    retVal = SL_SelfTest_FEE(FEE_ECC_TEST_MODE_2BIT, TRUE, &failInfoFlash);
    INCREMENT_PASS_FAIL_COUNTER(failInfoFlash, retVal);
    #endif
    /* Run Diagmode 2 */
    retVal = SL_SelfTest_FEE(FEE_ECC_SYN_REPORT_MODE, TRUE, &failInfoFlash);
    INCREMENT_PASS_FAIL_COUNTER(failInfoFlash, retVal);

    /* Run Diagmode 3 */
    retVal = SL_SelfTest_FEE(FEE_ECC_MALFUNCTION_MODE1, TRUE, &failInfoFlash);
    INCREMENT_PASS_FAIL_COUNTER(failInfoFlash, retVal);

    /* Run Diagmode 4 */
    retVal = SL_SelfTest_FEE(FEE_ECC_MALFUNCTION_MODE2, TRUE, &failInfoFlash);
    INCREMENT_PASS_FAIL_COUNTER(failInfoFlash, retVal);

    retVal = SL_SelfTest_PSCON(PSCON_SELF_TEST, TRUE, &failInfoPSCON);
    INCREMENT_PASS_FAIL_COUNTER(failInfoPSCON.stResult, retVal);

    retVal = SL_SelfTest_PSCON(PSCON_ERROR_FORCING, TRUE, &failInfoPSCON);
    INCREMENT_PASS_FAIL_COUNTER(failInfoPSCON.stResult, retVal);

    retVal = SL_SelfTest_PSCON(PSCON_SELF_TEST_ERROR_FORCING, TRUE, &failInfoPSCON);
    INCREMENT_PASS_FAIL_COUNTER(failInfoPSCON.stResult, retVal);

    retVal = SL_SelfTest_PSCON(PSCON_PMA_TEST, TRUE, &failInfoPSCON);

  • 0 in reply to whong zhao
    TI__Guru**** 200246 points

    Hello whong,

    I don't have recommendation about which selftest you need to do for the runtime diagnostic. Please refer to our safety manual for the Safety Feature and Diagnostic.