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TMS570LS3137: Need information set interrupt level register

Part Number: TMS570LS3137


Hi Team,

Could see we have interrupt level set registers in SCI and MibSPI modules. But the writting 0's into these registers have different meaning.
i.e., in case of MibSPI:

9 TXINTLVL Transmit interrupt level.
0 Transmit interrupt is mapped to interrupt line INT0.
1 Transmit interrupt is mapped to interrupt line INT1.

in case of SCI:

31 SET BE INT LVL Set bit error interrupt level. This bit is effective in LIN mode only.
0 Read: The interrupt level is mapped to the INT0 line.
Write: Writing a 0 to this bit has no effect.
1 Read or write: The interrupt level is mapped to the INT1 line.

So, in case of SCI module, if we initially configure receive interrupt to be routed through INT1 line and later if we want to change to INT0 line, how to do it. The reason is writting 0's have no impact on it.

A quick response is highly appreciated.

Regards,
M.Sreenivasan.