This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Compiler/TMS570LS3137: What coding style for EMIF async page read implementation?

Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

Tool/software: TI C/C++ Compiler

Greetings to advanced,

I tried to code the NOR Flash 'Page Read' operation attached with EMIF async. interface.

HALCoGen settings shown as follow.






I coded a 'for loop' to read 16 successive halfword locations within a page region of a flash device

but the waveform observed from oscilloscope was not same as TRM.

That is EMIF_nCSx pulsed for each 16-bit data not generated just one pulse. 

Should we implement NOR Flash page read in assembly?  What coding style in C need for this purpose ? 

An illustration for reference is a plus. Thanks for any help.





Best Regards,

Mason

  • Hello Mason,

    I don't get your point clearly.

    If you do byte read from an async memory, the nCS should be asserted for each byte. If you read 16-it data, the nCS is asserted every 16-bit half-word.

    You can use either assembly code or C/C++ code to perform NOR flash read/write/erase.

    Can you please capture the nCS/nDQM[1:0]/nOE/= and data from your oscilloscope?

    I posted an example for NOR flash read and write before:

    e2e.ti.com/.../2704297 flash#2704297

  • Hi Wang

    Thank you for response and providing me the NOR flash reference code. Yes! I really use incorrect words 'Page Read' that make you mistakes. My bad. It should be 'Page Mode' instead. I want to code the NOR Page Mode' accesses that are similar to SDRAM burst read/write operations for better performance. I tried a for loop (or while loop) to read 16 successive halfword locations. EMIF_nCS totally asserted 16 pulses halfword by halfword rather than 'Page Mode' waveform that just assert once. So I want to know how to code for this. What coding style it should be to make it work.

    Best Regards,

    Mason

  • Thanks Mason

    Does the NOR flash you used support 8-word (16-bit) page mode? Are all the 16 data you read from the NOR flash correct?

    By default, the EMIF space is configured as "normal" memory. You need to use R4 MPU to configure it as "device" memory.

  • Hi Wang

    The NOR flash I used support 32-byte (16 halfwords) Page Mode read. Both CFI commands and data array operations  work well. MPU was configured as 'Strongly Ordered' memory. Before any NOR operations, MPU was firstly initialised and enabled by calling _mpuInit_() function after startup procedures. I will try the 'Device' memory type as you indicated. But the question is the 'Strongly Order' type I configured cannot make it work as well?

    Thanks and Regards,

    Mason

  • Hi Wang,

    The EMIF asynchronous interface was configured to 'Device' type configuration but nothing change.

     

    For your reference,

    Mason

  • Hello Mason,

    I am sorry for late response. I did a test today, and got the same result. The nCS signal are toggled 16 times. I will spend some time to debug this issue, and keep you informed.

  • Hi Wang

    Thanks for your response and working efforts for this issue. I think that it is tricky to make compiler show its power for this.

    I read a reference in assembly from the link

    http://e2e.ti.com/support/microcontrollers/hercules/f/312/t/638972?tisearch=e2e-sitesearch&keymatch=EMIF%20burst%20length

    discussion on the topic of burst length supporting. I have tried the manner like that and IT WORKS.

    Now the question is how to work out in C and how to make compiler output magic code similar to the reference link.



    Thanks again and Best Regards,

    Mason

  • Hello Mason,

    Glad to know the issue has been sloved. You can embed this assembly code into your c/c++ project.

  • It seems that multiple data load/store instructions should be applied to Page Mode implementation.

    Thank you, Wang :)

      

      

    Best Regards,

    Mason