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TMS570LS3137: Processor Error when Interrupt triggers during memset

David Cothran
Intellectual 300 points

Part Number: TMS570LS3137

So I have an memset which is zeroing a large struct (~3900 bytes). If an interrupt (specifically in this case a GIO interrupt triggered by an external device interrupt line connected to GIOB[X], triggering every few ~4 milliseconds) happens during the memset (usually after the TST command - see below). The easiest way to get the error is to step through the assembly and thus the interrupt would trigger between each step. Also able to get it if you put a while loop around the memset which will cause the issue to trigger at a higher rate than not looping around it.

 

I have read that when the interrupt triggers some data the memset is using may get overwritten and that is what causes the error. I have worked around the issue by using a for loop instead of the memset which seemed to have fixed the error. Any additional information regarding the memset error would be appreciated.

 

__TI_MEMSET:	.asmfunc stack_usage(20)
	PUSH	{R0, R4, R5, R6, LR}	; save R0 also since original dst
					; address is returned.

	TST	R0, #3			; check for word alignment
	BEQ	_word_aligned

void initializeStruct(MyStruct * const ptr)
{
    memset(ptr, 0x00, sizeof(MyStruct));
}


#pragma CODE_STATE(gioLowLevelInterrupt, 32)
#pragma INTERRUPT(gioLowLevelInterrupt, IRQ)
void gioLowLevelInterrupt(void)
{
    uint32_t offset = gioREG->OFF2;

/* USER CODE BEGIN (17) */
/* USER CODE END */

    //if (offset != 0U)
    //{
    //    offset = offset - 1U;
    //    if (offset >= 8U)
    //    {
    //        gioNotification(gioPORTB, offset - 8U);
    //    }
    //    else
    //    {
    //        gioNotification(gioPORTA, offset);
    //    }
    //}

    gioREG->FLG = 0xFF; // Clean the GIO Interrupt flag register

/* USER CODE BEGIN (18) */
/* USER CODE END */

}

I would just like additional details on the cause of the issue.

Thanks,

David Cothran

  • 0
    TI__Guru**** 200206 points

    Hi David,

    What is the error? Please refer to the CORTEX-R4#66 in TMS570LS3137 errata:

    I am not sure if this is related to this bug.

  • 0 in reply to QJ Wang
    Intellectual 300 points

    QJ,

    That does seem like it may be causing the issue.

    The error in the ESM/FlashWrapper registers show the following:

    It appears to be a group 3 channel 7 error event but the address it shows 0x00088738 is in the FLASH section but I do not see anything at that location in the map file. Any idea what that means?

    In the map file the struct that is getting memset is on the stack at location:

    .bss       0    08002000    00002080     UNINITIALIZED
                      08002000    00000f94     (.common:myStructVarGlobal)

    Thanks,

    David Cothran

  • 0 in reply to David Cothran
    TI__Guru**** 200206 points

    Hello,

    The Cortex-R4 CPU may generate speculative fetches to any location within the ATCM memory space. A speculative fetch to a location with invalid ECC, which is subsequently not used, will not create an abort, but will set the ESM flags for a correctable or uncorrectable error. An uncorrectable error will unconditionally cause the nERROR pin to toggle low. Therefore care must be taken to generate the correct ECC for the entire ATCM space including the holes between sections and any unused or blank Flash areas.

  • 0 in reply to QJ Wang
    Intellectual 300 points

    QJ,

    Appreciate all your information and help!

    Thanks,

    David Cothran