Hello ,
Writing bulk data of 1.5 MB to Bank 1 starting at address 0x00260000 Flash controller fails to write .
I am implementing Boot loader to Erase Bank 1, and write bulk data at once the Erase operation works with out any failure .
While Writing to the Flash full data of 1.5 MB is received and stored in EMIF RAM ( 8 MB ) and at once written to FLASH Bank 1 using library F021_API_CortexR4_BE.lib and API
Flash_registers.FBPROT=1;
status = Fapi_setActiveFlashBank((Fapi_FlashBankType)0x01U);
status = Fapi_enableMainBankSectors(0xFFFFU);
Fapi_issueProgrammingCommand((uint32_t *)dst, ( 0x00180000)
(uint8_t *)src, ( 0x80000000 )
(uint8_t) bytes_size_to_write, ( full 1.5 MB size )
0,
0,
Fapi_AutoEccGeneration);
Writing address 0x00180000 to 0x00260000 there are not errors in writing the data to Flash . Starting address 0x00260000 the Flash controller does not write to the Flash it aborts all the time .
Should I implement additional logic for writing to Bank 1 address 0x00260000 to 0x00300000 .
ERRATA FMC#80 Abort on Accesses Switching Between two Banks . A 3MB device that is comprised of two 1.5MB flash banks may generate an abort if an access to bank 0 is followed by an access between 1.5MB and 2MB (in bank 1). Likewise, the device may generate an abort if an access to bank 1 is followed by an access between 1MB and 1.5MB (in bank 0).
the Flash related code is executing in RAM
flashAPI :
{
boot_udf.obj (.text,.const)
boot_flash.obj (.text,.const)
Boot_Erase.obj (.text,.const)
Boot_Emif_Write_Data.obj (.text,.const)
--library= F021_API_CortexR4_BE.lib <*.obj > (.text,.const,.bss,.data)
} load = FLASH_API, run = SRAM, LOAD_START(__SEC_OEM_UNSAFE_LOAD_START), RUN_START(__SEC_OEM_UNSAFE_RUN_START), SIZE(__SEC_OEM_UNSAFE_RUN_SIZE), crc_table(_Bootloader_firmware_image_crc_table, algorithm=TMS570_CRC64_ISO)
