TMS570LC4357 EMIF cs singnal looks strange

Hello, Sunil

The strange part is in write operation. The configuration of hold time is 2, as same as setup time. So in normal mode waveform,  CS signal is expected to have  2 clocks extra part both behind and after WE signal.

There is almost 2 clocks part before WE signal, but the part WE signal is much more than 2 clocks.It looks like:

In the strobe mode, things become more crazy. There are extra CS singal without WE or OE signal. That means CS signal is pull low for neither write or read.

That is the abnormal part for me.

hechao 13124/inovance,

Hello,

Can you please include the code that you are using to make these accesses?

Regards,

Sunil

Hello, Sunil

Our code are sperated into several parts.

First , the macro for addres:

#define MVB_DEVICE_ADDR_TCM  0x64026000L
#define MVB_REG_ADDR_TCM      0x64028000L

Second, assign the addres to variables:

 cch_data_reg    = MVB_DEVICE_ADDR_TCM;
 cch_stat_reg    = MVB_DEVICE_ADDR_TCM + 4;

Third, define macro for operation:

#define cch_get_reg(address) ((CCH_BYTE)(*((CCH_VOLATILE CCH_BYTE*)address)))
#define cch_put_reg(address, data) (*(CCH_VOLATILE CCH_BYTE*)address = (CCH_BYTE) data)

#define cch_tx_ready() ( (cch_get_reg(cch_stat_reg) & cch_stat_txe) == cch_stat_txe )
#define cch_rx_ready() ( (cch_get_reg(cch_stat_reg) & cch_stat_rxf) == cch_stat_rxf )

CCH_BYTE is define as char, and CCH_VOLATILE is key word volatile

Finally, call the macro to read or write, here is a sample for writting:

cch_put_reg(cch_data_reg, *p_packet);

We wish this code helpful.