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TM4C1290NCPDT: Program Loading Error

Part Number: TM4C1290NCPDT
Other Parts Discussed in Thread: SEGGER

When I am trying to load the usbserialdevice_DK_TM4C129X_TI which I edited for my CPU and application, I always got the following error:

CORTEX_M4_0: GEL Output:
Memory Map Initialization Complete
CORTEX_M4_0: Trouble Writing Memory Block at 0x7ff0 on Page 0 of Length 0x24c0: Flash download failed! ...
CORTEX_M4_0: File Loader: Verification failed: Target failed to write 0x00007FF0
CORTEX_M4_0: GEL: File: C:\ti\Temp\MVerse v2.0f\Debug\MVerse v2.0g.out: Load failed.

Loading shorter programs that didn't get to this address loaded and ran fine.  So I replaced the CPU, and it programmed twice, and now it too exhibits this exact same error.

JTAG interface is a Segger Flasher, Vdd is 3.301V and VddC is 1.192V and both are clean, there are .01uf, .1uf, 1uf low ESL and 2.2uf low ESL caps near pin 115 and a .01uf and .1uf caps near pin 87 (pins 87 and 115 are connected electrically).

During the two times it loaded and ran, the code would always breakpoint at the same line each tim (no breakpoints other at the start of main() )

In System.c

 

/*

* ======== System_processAtExit ========

*/

Void System_processAtExit(Int stat)

{

   Int i;

 

   Gate_enterSystem();

 

   for (i = module->numAtexitHandlers; i > 0; i--) {

       (module->atexitHandlers[i - 1])(stat);

   }

   System_SupportProxy_exit(stat);

}

 

In SysMin.c

/*

* ======== SysMin_putch ========

*/

Void SysMin_putch(Char ch)

{

   IArg key;

  

   if (SysMin_bufSize != 0) {

 

       key = Gate_enterSystem();

 

       module->outbuf[module->outidx++] = ch;

       if (module->outidx == SysMin_bufSize) {

           module->outidx = 0;

           module->wrapped = TRUE;

       }

       Gate_leaveSystem(key);

   }  

}

Help.  Thanks

  • Can you still connect with a debugger and see internal memory and registers? If so, can you check that the FMPREO register (flash memory protection register 0) is still 0xFFFFFFFF?

  • Thanks Bob.  No, I'm not able to see the registers once the load failed.  However, while scoping the JTAG signals the device programmed!  So I think it must be a problem with my hardware which I'm checking into.  I'm ready to close this issue as soon as someone can tell me where I can adjust the JTAG clock speed - I don't see a way to manually set it with the Segger programs.

  • It turns out that even though I had the VddC bypass caps close to pin 115, their traces should have been bigger, after running some additional copper it is running much more reliably.  I'll close this issue and open another one with the question about how to set the JTAG speed.