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TMS570LC4357: How to control ECLK2 pin

Part Number: TMS570LC4357

Hello,

We are using the TMS570LC4357 and we need more information about the control of ECLK2 in fucntionality ?

Indeed, the TMS570LC4357 reference manual suggest to control the ECLK signal (in GIO or functional mode) by the ECPCLKFUN bit of SYSPC1.

In section 2.5.3 and 2.5.1.43, it is described that ECPCLKFUN bit must be placed to '1' to place a clock source on the ECLK pin.

But in section 2.5.1.1 in SYSPC1 register description, no difference is performed for ECLK1 and ECLK2.
When we configure SYSPC1[0] for ECLK2 configuration at 1 for functional mode, it does not work.

By some test in our application, it seems that ECLK1 and ECLK2 are controlled as follows:
SYSPC1[0] for ECLK1 configuration (0 for GIO and 1 for functional mode)
SYSPC1[1] for ECLK2 configuration (0 for GIO and 1 for functional mode)

Could you confirm us this please ?

Best regards,

Christopher

  • Hi Christopher,

    Yes, you are correct. SYSPCx registers bit 1 control the I/O functionality of ECLK2. The output clock functionality is controlled via the ECPCNTL1 register, as described in the reference manual.

    I have filed a documentation update for the TRM to include the I/O controls for ECLK2.

    Note that you do have to configure the I/O multiplexing to enable ECLK2 to be output on K3.

    Regards,

    Sunil