TMS570LS1227: EMIF Interface - access issue

Bob Grice

Part Number: TMS570LS1227

We have a TMS5701227 acting as a 'flexray gateway'. We currently have the flexray operational with its transmitted and received data items being held in internal RAM, and we now need to complete the system design by moving these data items from internal RAM to an external RAM implemented as part of an FPGA.

The problem we are having is with the external memory interface basically not providing the signals we expected, to identify the problem we added some test code (below), we also increased the SETUP, STROBE and HOLD times as suggested in another EMIF thread.

Modified ASYNC setup : SETUP, STROBE, and HOLD fields in CE2FFG to maximum values

emifREG->CE2CFG = (uint32)((uint32)0U << 31U)|

Modified PMU region 5 from DEVICE NON SHARED to STRONGLY ORDERED SHAREABLE and enabled sub regions 6 & 7 base address and size unchanged at 0x60000000 to 0x63ffffff

; Setup region 5

        mov   r0, #4
        mcr   p15, #0,    r0, c6, c2, #0
        ldr   r0, r5Base
        mcr   p15, #0,    r0, c6, c1, #0
        mov   r0, #0x0000
        orr   r0, r0,    #0x1300
        mcr   p15, #0,    r0, c6, c1, #4
        movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x19 << 1) + (1))
        mcr   p15, #0,    r0, c6, c1, #2

Test Code (outline)

    U16 Val;
    volatile U16* Loc;

    Val = 0x5555;
    Loc = (volatile U16*) 0x60000000;

…..

*Loc = Val;

EMIF Results obtained

Which appears to show the device is attempting some version of a 32 bit write, and with data different to that used by the code.

over 6 years ago

0 Sunil Oak over 6 years ago

TI__Mastermind 49120 points

Please make sure that the MPU is actually enabled. There should be a call to mpuInit() in your start-up sequence or main function.

Regards, Sunil

0 Bob Grice over 6 years ago in reply to Sunil Oak

Prodigy 140 points

Hi Sunhil,

Apologies I should have checked for that before contacting you. However, while that has changed the observed activity it is still incorrect as there does not appear to be any nDQM activity, the address is still 0x3c and the data still 0xffff

0 Sunil Oak over 6 years ago in reply to Bob Grice

TI__Mastermind 49120 points

Hi Bill,

Please check whether you have enabled the EMIF signals multiplexed with N2HET2 signals to be output. See section 4.5.2 of the reference manual, SPNU515C.

Regards, Sunil

0 Bob Grice over 6 years ago in reply to Sunil Oak

Prodigy 140 points

Hi Sunhil,

I can confirm that EMIF_FUNC (bit 31 of GPREG1) is being set in the call to muxInit() and is set at the point when I make the eMIF access

0 Sunil Oak over 6 years ago in reply to Bob Grice

TI__Mastermind 49120 points

Hi Bob,

Can you please upload the sections of your code configuring the EMIF, the MPU, the I/O multiplexing, and the code that makes these write accesses? Please also provide information about the clock domain frequency settings. It would certainly help to have the entire code project, but at least these configurations in case it is not feasible to upload the entire code project.

Regards,

Sunil

0 Bob Grice over 6 years ago in reply to Sunil Oak

Prodigy 140 points

Exported project as zip and attached.

The routine that writes to external memory is in umain.c - CMD_Test(). For debug purposes we aligned the write with the falling edge of a 1 kHz clock signal connected to gpio port B bit 0, but this was just used as an initial trigger to confirm that what we were seeing on the bus was related to the access the code was making as we were not seeing the expected signals.

7610.Boot_export.zip

0 Bob Grice over 6 years ago in reply to Bob Grice

Prodigy 140 points

Following tests on a TMS570LS12X HDK board, I found that the EMIF bus was operational.

The fault was due to ORCAD symbol file being interpreted incorrectly and the wrong pins used on our PCB.

0 Sunil Oak over 6 years ago in reply to Bob Grice

TI__Mastermind 49120 points

Thanks for the confirmation Bob.

Regards,

Sunil

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TMS570LS1227: EMIF Interface - access issue