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CCS/RM44L920: Flash / Ram ECC enable

user5890695
Prodigy 165 points

Part Number: RM44L920
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Hi ,

My FW is composed by a bootloader FW and a APP FW. I want to use Flash/RAM ECC feature in APP FW, and I enabled Flash/ RAM ECC with demo code generated by HalCoGen:

Enable Flash ECC:

 flashWREG->FEDACCTRL1 = 0x000A060AU;

 _coreEnableFlashEcc_();

Enable RAM ECC:

memoryInit(0x1U);

_coreEnableRamEcc_();

At the same time Flash API function is integrated in APP FW,  I performed CopyApi2Ram() function at the beginning of main() in APP FW.

And now, my question is if  I enable Flash ECC and RAM ECC at startup routine void _c_int00(void) of APP FW , my  code always stucked in 0x10 (data aborted function) when steped into CopyApi2Ram().

I wonder if  Flash/Ram ECC is initialized appropriatly? What is the reason Flash / RAM are uncorret?

Many thanks,

Catherine

 

  • 0
    TI__Guru**** 199216 points

    Hello Catherine,

    Did you program flash ECC when loading the code onto the flash?

  • 0 in reply to QJ Wang
    Prodigy 165 points

    Hi  QJ,

    I program flash ECC by click "Auto ECC Generation" in CCS, And I did see ECC data has been programed into space 0xF040000.

    But it is about Flash ECC, what is the problem with RAM ECC. I wonder if it is enough to enable RAM ECC with " memoryInit(0x1U);  _coreEnableRamEcc_();"

    Or would you please share me with an example of initialize Flash ECC and Ram ECC?

    Thanks,

    Catherine

  • 0 in reply to user5890695
    Prodigy 165 points

    Hi QJ,

    Did I describe my question clearly?

    Thanks,

    BR,

    Catherine

  • 0 in reply to user5890695
    TI__Guru**** 199216 points

    Hello,

    An error occurring on a data memory access can generate a data abort. Aborts can occur for a number of reasons, for example:

    • a permission fault indicated by the MPU
    • an error response to a transaction on the AXI memory bus
    • an error detected in the data by the ECC checking logic.

    Please check the Data Fault Status Register (DFSR) of CP15 (CCS registers window contains CP15). The DFSR holds status information regarding the source of the last data abort. The Data Fault Address Register (DFAR) holds the address of the fault when a precise abort occurs.