TMS570LC4357: MibSPI slave to transfer large data blocks

Jeremy Henderson

I want to configure a TMS570LC4357 as a SPI slave device which can transfer large amounts of data (>3KB) for each SPI transaction. Ideally the master would bring the CS low and clock out the entire data block, then bring the CS high. Is this possible with MibSPI mode on the TMS570LC4357?

I was thinking to use a single TG configured with all 128 buffers and two DMAs, each to update one half of the TG buffers.

The reference manual has a statement in section 28.2.2.1.1 that makes me think I will need a CS toggle in between SPI transmissions.

"In case of Slave mode, after the Receive data is copied to the RX RAM, Sequencer waits for the next active Chip Select trigger to fetch the next data."

over 6 years ago

0 QJ Wang over 6 years ago

TI__Guru**** 199386 points

Hello,

In MibSPI slave mode, the MibSPI uses the chip-select pins 0 to 3 to generate a trigger to the corresponding Transfer Group. In slave mode, the fields like trigger source and trigger event are not taken into account by the sequencer. Only the SPISCS pins can trigger a Transfer Group. The Chip-select trigger operates as a level sensitive trigger.

0 Jeremy Henderson over 6 years ago in reply to QJ Wang

Intellectual 740 points

What happens when it gets to the end of the transfer group? Does it roll over back to the first buffer of the TG?

0 QJ Wang over 6 years ago in reply to Jeremy Henderson

TI__Guru**** 199386 points

If oneshot is used, DMA will be disabled after ICOUNT+1 transfers.

If ONESHOT is not used, the transfer is controlled by DMA. After ICOUNT+1 transfer, it will roll back to start another transfer.

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TMS570LC4357: MibSPI slave to transfer large data blocks