Hi,
My problem is similar to the problem reported on https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/662232?RM57L843-DMA-and-SPI-non-MIBSPI-Not-continuous-Chip-Select-signal
However compared to above, I have managed to generate CS hold by the following procedure:
1) Disable SPI
2) Set MSB with CS hold configuration in SPI->Dat1
3) Enable SPI
4) Enable DMA
5) HW Trigger SPI DMA Transmit and Receive
6) Detect DMA BTC Interrupt and do the following within DMA BTC ISR
- Disable Trigger SPI
- Disable DMA
- Disable SPI
- Set CS Hold configuration to zero
I am repeating this procedure periodically. I noticed that this seems to work fine for a short period of time. After a few minutes, DMA interrupt does not occur. My question is,
1) Is this normal? If not, then what would be a good solution in this particular case?
2) Could you suggest SPI compatibility mode DMA settings, which could automatically generate CS hold during each SPI DMA TX/RX Cycle
Thanks in advance. Look forward to receiving your reply.
Kind regards,
Farrukh
