• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 31 subscribers
  • Views 233 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS570LC4357: SCI Multiple data interrupts

Shivam Kakad
Expert 1355 points
Part Number: TMS570LC4357


Tool/software: Code Composer Studio

Hi,

I am using the DMA-SCI communication for the multiple data with hardware dma request.

In which i am enabling the dmaInterrupts once the block is transferred.

but for the multiple data, it should provide the interrupt after each block is transferred. How can we achieve this?

And if my element count is 1, frame size is 128 and i am reading/writing the data of 16bit, then what would be my block size?

In my case how many times will i get the dmaInterrupt?

Can anyone please help me in getting clear understanding of it?

Regards,

Shivam Kakad.

  • 0
    TI__Guru**** 198766 points

    Hello,

    1. enable DMA: dmaEnable();

    2. enable interrupt after reception of data: dmaEnableInterrupt(DMA_CH0, BTC);

    3. configure the DMA transfer packet:

        Element size=1, Frame size=18

        Block size can be any number for frame. If Block size is 1 frame, then Block_Size=18

        source address for TX is the address of your data in SRAM

        destination address is: (uint32)(&(scilinREG->TD))+3;

        read size is 8 bit, WRsize is 8 bit

        Port should be: PortA_read_Portb_write   (refer to TRM, page 699)

    4. assign packet to DMA channel: dmaSetCtrlPacket(DMA_CH0, g_dmaCTRLPKT_TX);

    5. Set DMA channel trigger mode: dmaSetChEnable(DMA_CH0, DMA_HW);

    6. Enable TX DMA: scilinREG->SETINT = (1 << 16);

     If you use block transfer, you will get one interrupt after one block data is transferred. Please refer to page 712 of TRM