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CCS/TMS570LC4357: Issue in understanding the HW triggering for SPI DMA

Shivam Kakad
Expert 1355 points
Part Number: TMS570LC4357


Tool/software: Code Composer Studio

Hi,

In my project i am using the SPI-DMA configuration, where i am triggering the channels by the Hardware request.

I am configuring the packets, for transmission and Reception, and enabling the interrupts when the first data get transferred completely.

I am unable to get the Frame Transfer Interrupt after the complete Transmission. and need the clear understanding about the hardware triggering that how it will trigger the next receive packet when we are transmitting the packets continuously and what next receiving packet should contain if the receiving packet size in configuartion is much less than the Transmitting packet?

Regards,

Shivam Kakad

  • 0
    TI__Guru**** 198766 points

    Hello Shivam,

    The SPI generates a request on the TX_DMA_REQ line each time the TX data is copied to the TX shift register either from the TXBUF or from peripheral data bus (when TXBUF is empty).

    The first TX_DMA_REQ pulse is generated when either of the following is true:

    • DMAREQEN (SPIINT0[16]) is set to 1 while SPIEN (SPIGCR1[24]) is already 1.
    • SPIEN (SPIGCR1[24]) is set to 1 while DMAREQEN (SPIINT0[16]) is already 1.

    The SPI generates a request on the RX_DMA_REQ line each time the received data is copied to the SPIBUF.

    The DMA request lines ( RX_DMA_REQ, and TX_DMA_REQ) are defined in table 6-41 of Datasheet.

    RX DMA doesn't know and doesn't care how TX DMA is configured. It transfers data from spiBuf to SRAM based on RX DMA packet configuration. RX DMA is triggered whenever the received data is copied to the spiBuf.