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CCS/TMS570LC4357: Read multiple ADC channel values from memory with DMA

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Dear TI support Team, 

i just started to work with Microcontrollers ( STM32 and Hercules ) and want to calculate Power as fast as possible by reading Current values via ADC. 
Because of that, i try to configure a DMA transfer of the converted ADC values ( 2 channels, e.g. I1 and I2 ) without generating any interrupts that will stop my main program temporarly. Thus, if the ADC is also configured in continous mode, the last converted current values should always be available for my main program. 
I managed to realize this ADC DMA configuration with the STM32, but i struggle with the Hercules. I already read multiple threads, like 

https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/451165?Is-there-any-alternate-way-to-read-ADC-result-data-using-DMA-other-than-FIFO-incase-if-multiple-channels-are-configured-in-single-group

for example, but it still doesn't work. I also didn't understand the source adress value, also the element source offset, that was given in the copied thread above. If I understand it correctly, the base source address of the Group1 RAM should be 0xFF30000 + (numberofChannelsEvent ( BNDA) + Result )*4. For example my first result from channel 0 is always at 0xFF30000 + 4*16 ( if BNDA = 8 ) + 0 ( first result). This can also be seen in my dma_configuration in the attachement. 

Also, if I try to read the ADC data without DMA, it seems to work just fine. 

The sys_main ( I only wrote code there ) and the HalCoGen configurations can be found in the attachements. 

Thank you,

Sebastian 0310.PowerCalc_simple.zip

  • Hello,

    1. The base address for the ADC1 result memory is 0xFF3E0000 (Table 6-25 in Datasheet) and for the ADC2 result memory is 0xFF3A0000(Table 6-25 in Datasheet)

    2. If you use channel 1 and channel 2 in ADC1 group 1, and you want to read out the ADC conversion results from the group1 memory directly. The conversion results for the group 1 are accessible starting from address ADC RAM Base Address + 4*2*BNDA. The first result at this address is for the input channel 1, the next one is for input channel 2, and so on.

    2. If you want to read out the conversion results for the Group1 from a FIFO queue, you can use the buffer register: (uint32)(&adcREG1->GxBUF[1] as the source address in DMA packet configuration.

     

  • Hello,

    Just read your code, the DMA port is not correct.

    On TMS570LC43x device, the PORTA is used for Flash, SRAM, and EMIF. The PORT B is used for all the peripherals and all peripheral memories (ADC RAM). So the DMA port in your DMA packet configuration should be:

    PORTB_READ_PORTA_WRITE which is 0x00. You use 4 in your config,

  • Dear Mr. Wang,

    thank you for the fast reply! Changing the Port from 4 to 0 in the DMA Controlpackage configuration managed to solve the DMA transfer issue. Just to be sure, may you have a look at my code again at the ADC_postinit function, in which I configure the adc registries to enable DMA in circular mode?

    The receiving values seem to be a bit randomized ( sinusoidal voltage should be received with a range form [0 3.2]V ). If I configure the receiving Array size ( aADC1ConversionDataX ) to be higher, the values do not resemble a sinusoidal form. But I try to solve this on my own first, it would only be nice if you could have a look at the ADC_postinit function. 

    Kind regards,

    Sebastian