TMS570LS3137: RAM ECC test generated by HALCOGEN

Kalyan Vagvala61

Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

Hello,

Referring to Section 3.4 http://www.ti.com/lit/an/spna126/spna126.pdf document, RAM ECC is tested by changing the RAM data bits. But the code generated by HALCOGEN toggles ECC bits to verify RAM ECC Logic.

I tried checking RAM ECC functionality as mentioned in Section 3.4 of SPNA126 document, Observation is When i modify a bit in RAM memory, it is expected that corresponding RAM ECC should not change as i already disabled ECC generation in Core. But i could see in memory browser that RAM ECC memory getting auto corrected when changing RAM memory contents.

Is there any sample code as mentioned in SPNA126 document?

Thanks,

Kalyan

over 6 years ago

0 QJ Wang over 6 years ago

TI__Guru**** 199146 points

Hi Kalyan,

There is no example code for section 3.4, but you can modify the code (checkB0RAMECC or checkB1RAMECC) generated through HALCoGen for section 3.4.

0 Kalyan Vagvala61 over 6 years ago in reply to QJ Wang

Expert 1075 points

Hi Wang,

Thanks for your response. I tried the procedure explained in Section 3.4 to test RAM ECC functionality.

My observation is that when corrupting RAM data bits, ECC is automatically gets corrected even though i disabled RAM ECC by calling "_coreDisableRamEcc_()" just before corrupting RAM data BIT-0.

Can you please help me to resolve this issue?

Thanks,

Kalyan

0 Sunil Oak over 6 years ago in reply to Kalyan Vagvala61

TI__Mastermind 49120 points

Every write to the RAM also writes the corresponding ECC value. The "_coreDisableRamEcc_()" function only disables the CPU response to an ECC error on a read access (there is no ECC checking on a write access).

0 Kalyan Vagvala61 over 6 years ago in reply to Sunil Oak

Expert 1075 points

Hi Sunil,

Thanks for your response. How can i test RAM ECC by following procedure explained in Section 3.4 ?

Is it possible to change RAM data bits and disable ECC generation?

Thanks,

Kalyan

0 Sunil Oak over 6 years ago in reply to Kalyan Vagvala61

TI__Mastermind 49120 points

Hi Kalyan,

As I mentioned, the CPU writes the correct ECC along with the data on every write. In that case, the only way to test an ECC error is to corrupt the ECC data with a single-bit or a double-bit error as required. The actual CPU response to these ECC errors is identical, regardless of whether the error is in the data or the ECC.

Regards, Sunil

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TMS570LS3137: RAM ECC test generated by HALCOGEN