• State TI Thinks Resolved
  • Locked Locked
  • Replies 7 replies
  • Answers 1 answer
  • Subscribers 30 subscribers
  • Views 1123 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LS3137-EP: FreeRTOS: Configuring MPU

Mary Jane
Prodigy 150 points
Part Number: TMS570LS3137-EP
Other Parts Discussed in Thread: HALCOGEN, TMS570LS3137

Hello,

I am using TMS570LS3137 with FreeRTOS (codes are created in HALCoGen). I also use SPI and Flash Memory. I can initialize SPI or read/write flash memory before FreeRTOS scheduler starts. However, after the scheduler starts, I cannot initialize SPI, or read/write flash memory. This is because mpu is reconfigured in vTaskStartScheduler()-> xPortStartScheduler()-> prvSetupDefaultMPU(). So far I have found 2 solutions:

-Edit os_mpu_wrappers.c so that you can write functions that disables and enables mpu and switch between user mode and priviliged mode; and use these functions before and after a critical operation.

-Edit prvSetupDefaultMPU() so that you can configure which areas are accessible in user mode.

I am now focused on the second solution, and setting portPRIVILIGED_FLASH_REGION to portMPU_PRIV_RW_USER_RW_EXEC instead of portMPU_PRIV_RO_USER_NA_EXEC, I can read/write flash memory using ti_fee. However, I could not handle SPI initialization, and I don't think this is a very well solution since kernel code is also in flash memory and can be damaged.

What can I do? Any help is appreciated.

Regards,

Mary Jane

  • 0
    TI__Guru 50170 points

    Hi, Mary,

    Let me try it first to see what I get.

    Rex

  • 0 in reply to Rex Chang
    Prodigy 150 points

    Hi Rex,

    Thanks, I am waiting for your answer.

    Mary Jane

  • 0 in reply to Mary Jane
    TI__Guru 50170 points

    Hi, Mary,

    Sorry for the slow response. I need to work with a co-worker who has the hardware access but is on a business trip.

    I looked at your configuration, You had portPRIVILIGED_FLASH_REGION configured to portMPU_PRIV_RO_USER_NA_EXEC which is No Access for User mode. Should it be PRIV_RO_USER_RO_EXEC, read-only user mode?

    Rex

  • 0 in reply to Rex Chang
    Prodigy 150 points

    Hello Rex,

    I guess I could not explain well. portPRIVILIGED_FLASH_REGION was configured to portMPU_PRIV_RO_USER_NA_EXEC, and when I changed it to portMPU_PRIV_RW_USER_RW_EXEC, reading from and writing to flash is ok; which means you are right, but that is not the problem.

    The problem is SPI. I tried changing all access levels to portMPU_PRIV_RW_USER_RW_EXEC in prvSetupDefaultMPU(), still did not work. SPI could not be initialized.

  • 0 in reply to Mary Jane
    TI__Guru 50170 points

    Hi, Mary Jane,

    Is it possible the configuration got overwritten somewhere else? It seems to me that vPortStoreTaskMPUSettings() also setting attributes to the MPU regions and it gets called in 2 places in os_tasks.c. Do you think it may change the setting?

    Rex

  • 0 in reply to Rex Chang
    Prodigy 150 points

    Hello Rex,

    I see your point. Yes, vPortStoreTaskMPUSettings() is called in 2 places in os_tasks.c, and one of them is actually called at runtime (in xTaskCreate). If I got it right, each task has its own MPU setting. If no MPU setting is passed, a default MPU setting is applied in vPortStoreTaskMPUSettings(). All is OK up until here, but I don't know the mpu regions and how to properly configure them. In addition, HALCoGen and FreeRTOS has different interfaces for MPU regions.

    Could you please provide me with the proper settings flash memory and SPI as in vPortStoreTaskMPUSettings()?

    Mary Jane

  • 0 in reply to Mary Jane
    TI__Guru 50170 points

    Mary Jane,

    From the code, it seems to me that region 0 and region 1 configure RAM at 0x08000000. The rest regions are configured with base address 0 (flash), size 0, and attribute 0. You should try to configure the next region with correct attributes and see if it works for you.

    You can look at the values of CP15 MPU registers when you can access the flash compared to those values of CP15 MPU registers after scheduler starts and fails to access the flash. I would think that they should have the same value. For the MPU attributes, please refer to ARM R4 TRM, http://infocenter.arm.com/help/topic/com.arm.doc.ddi0363e/DDI0363E_cortexr4_r1p3_trm.pdf

    Rex