This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LS3137: PLL1 clock configuration

Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

Hi Team,

With Halcogen, we are able to configure PLL1 with required frequency. But, always, in setupPLL method,

systemREG1->PLLCTL1 = | (uint32)((uint32)0x1FU << 24U)

R field is configured to 0x1F initially and then mapClocks, its updated as per the configured frequency. Do we have any reason for not configuring the desired R value as per our configuration need in setupPLL method itself? Do we have any instructions to be followed?