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TM4C123GH6PM: uDMA question

Szalai Peter
Prodigy 40 points
Part Number: TM4C123GH6PM


Hello,

I am trying to synthesize two analog waveforms in the same time with dual 10bit paralell DAC connected to my TIVA microcontroller pins as shown on the picture below:

The period of the waveforms shall be 55 us so I decided to use uDMA for that work. I want to configure the uDMA channels (14,2,4,6) to write data from the memory to the specified ports (B, E, D, F). The TIMER 2 and TIMER 3 moduls should trigger the uDMA channels very oftenb with the following sequence: CH14 - > CH2 -> CH4 -> CH6. The problem starts, when I decrease the timers preloaded values under ~30. Then my signals are falling apart. At the end, I want to setup the timers to generate uDMA event in every few clock cycles. Can you please help me? What am I doing wrong?

Thank You very much for your answer!

Best Regards,

Péter

Here is my code:

.
.
.
void InituDMA(void);
void InitGPIO(void);

//*****************************************************************************
//
// The control table used by the uDMA controller.  This table must be aligned
// to a 1024 byte boundary.
//
//*****************************************************************************
#pragma DATA_ALIGN(DMAcontroltable, 1024)
uint8_t DMAcontroltable[1024];

static unsigned char OutputState_B[1024] = {46,46,38,38,34,34,65,65,6,6,107,107,10,10,6,6,111,111,33,33,99,99,43,43,103,103,70,70,75,75,96,96,79,79,11,11,67,67,38,38,40,40,64,64,44,44,75,75,32,32,102,102,4,4,0,0,8,8,43,43,108,108,70,70,97,97,96,96,101,101,107,107,73,73,6,6,77,77,32,32,65,65,75,75,38,38,101,101,38,38,0,0,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,42,42,38,38,34,34,102,102,42,42,6,6,66,66,70,70,100,100,102,102,100,100,38,38,100,100,70,70,100,100,6,6,100,100,38,38,72,72,102,102,46,46,6,6,46,46,69,69,46,46,100,100,46,46,100,100,46,46,100,100,46,46,100,100,46,46,100,100,101,101,100,100,45,45,100,100,4,4,100,100,76,76,100,100,3,3,100,100,74,74,40,40,34,34,108,108,105,105,32,32,15,15,100,100,15,15,40,40,15,15,108,108,15,15,64,64,15,15,4,4,15,15,73,73,15,15,13,13,15,15,65,65,15,15,5,5,15,15,73,73,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,32,32,15,15,65,65,45,45,66,66,75,75,100,100,105,105,101,101,7,7,6,6,37,37,7,7,67,67,40,40,97,97,41,41,15,15,74,74,38,38,75,75,38,38,109,109,38,38,110,110,38,38,15,15,38,38,32,32,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,65,65,38,38,107,107,38,38,6,6,38,38,33,33,38,38,43,43,38,38,70,70,38,38,96,96,38,38,11,11,38,38,38,38,38,38,64,64,38,38,75,75,38,38,102,102,38,38,0,0,38,38,43,43,38,38,70,70,38,38,96,96,38,38,107,107,38,38,6,6,38,38,32,32,38,38,75,75,38,38,101,101,38,38,0,0,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,34,34,38,38,13,13,38,38,8,8,38,38,2,2,38,38,13,13,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,38,102,102,38,38,6,6,38,38,70,70,1,1,102,102,75,75,38,38,6,6,70,70,97,97,6,6,46,46,38,38,46,46,102,102,46,46,6,6,46,46,69,69,46,46,100,100,46,46,100,100,46,46,100,100,46,46,100,100,46,46,100,100,46,46,100,100,77,77,100,100,76,76,100,100,108,108,100,100,107,107,100,100,10,10,38,38,9,9,104,104,41,41,42,42,40,40,107,107,71,71,45,45,70,70,111,111,101,101,33,33,101,101,99,99,4,4,37,37,3,3,102,102,34,34,40,40,38,38,106,106,38,38,44,44,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,38,38,0,0,67,67,0,0,65,65,0,0,78,78,0,0,107,107,0,0,105,105,0,0,6,6,11,11,3,3,37,37,33,33,64,64,46,46,107,107,43,43,5,5,73,73,32,32,70,70,42,42,99,99,69,69,96,96,96,96,110,110,10,10,11,11,37,37,8,8,38,38,38,38,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38,46,46,38,38};
static unsigned char OutputState_D[1024] = {50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,52,48,48,52,52,48,48,52,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,54,50,50,54,54,50,50,54,54,50,50,54,54,50,50,54,54,50,50,54,54,50,50,54,54,50,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,54,50,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,48,52,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48,50,54,52,48};
static unsigned char OutputState_E[1024] = {0,0,10,10,0,0,10,10,2,2,8,8,0,0,12,12,14,14,12,12,14,14,14,14,12,12,14,14,14,14,14,14,12,12,0,0,12,12,0,0,14,14,0,0,12,12,2,2,12,12,2,2,14,14,6,6,12,12,4,4,10,10,4,4,10,10,4,4,8,8,6,6,10,10,10,10,8,8,10,10,8,8,8,8,10,10,8,8,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,8,8,10,10,6,6,8,8,2,2,14,14,12,12,12,12,10,10,14,14,10,10,0,0,10,10,2,2,10,10,4,4,10,10,6,6,14,14,4,4,0,0,10,10,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,14,14,8,8,14,14,8,8,12,12,8,8,8,8,8,8,10,10,8,8,6,6,8,8,4,4,4,4,0,0,6,6,2,2,2,2,2,2,2,2,2,2,14,14,2,2,12,12,2,2,12,12,2,2,8,8,2,2,8,8,2,2,6,6,2,2,6,6,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,0,0,2,2,2,2,2,2,0,0,2,2,2,2,6,6,4,4,6,6,6,6,6,6,4,4,6,6,6,6,8,8,4,4,10,10,6,6,10,10,4,4,10,10,6,6,10,10,8,8,10,10,8,8,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,8,8,10,10,12,12,10,10,12,12,10,10,14,14,10,10,14,14,10,10,14,14,10,10,0,0,10,10,0,0,10,10,0,0,10,10,2,2,10,10,2,2,10,10,6,6,10,10,4,4,10,10,4,4,10,10,4,4,10,10,6,6,10,10,10,10,10,10,10,10,10,10,8,8,10,10,8,8,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,12,12,10,10,10,10,10,10,6,6,10,10,2,2,10,10,12,12,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,8,8,10,10,14,14,10,10,12,12,8,8,14,14,4,4,0,0,6,6,2,2,0,0,4,4,2,2,6,6,2,2,4,4,2,2,10,10,2,2,8,8,2,2,8,8,2,2,8,8,2,2,8,8,2,2,8,8,2,2,8,8,2,2,8,8,0,0,8,8,2,2,8,8,0,0,8,8,2,2,8,8,4,4,8,8,6,6,4,4,4,4,4,4,6,6,0,0,4,4,0,0,6,6,12,12,4,4,14,14,6,6,10,10,8,8,10,10,10,10,6,6,8,8,6,6,10,10,2,2,10,10,2,2,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,8,8,0,0,10,10,0,0,10,10,0,0,8,8,0,0,10,10,0,0,12,12,2,2,14,14,2,2,12,12,2,2,12,12,0,0,14,14,4,4,12,12,4,4,14,14,6,6,12,12,6,6,14,14,6,6,14,14,8,8,0,0,8,8,2,2,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10,0,0,10,10};
static unsigned char OutputState_F[1024] = {8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8,8,0,0,8};

void InitTimer()
{

  SysCtlPeripheralDisable(SYSCTL_PERIPH_TIMER2);
  SysCtlPeripheralReset(SYSCTL_PERIPH_TIMER2);
  SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER2);

  SysCtlPeripheralDisable(SYSCTL_PERIPH_TIMER3);
  SysCtlPeripheralReset(SYSCTL_PERIPH_TIMER3);
  SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER3);

  SysCtlDelay(10);

  TimerConfigure(TIMER2_BASE, TIMER_CFG_PERIODIC);
  TimerLoadSet(TIMER2_BASE, TIMER_A, 20);

  TimerConfigure(TIMER3_BASE, TIMER_CFG_PERIODIC);
  TimerLoadSet(TIMER3_BASE, TIMER_A, 20);

  TimerIntClear(TIMER2_BASE,TIMER_TIMA_DMA);
  //TimerIntRegister(TIMER3_BASE,TIMER_A,TimerInt);
  //TimerIntEnable(TIMER2_BASE,TIMER_TIMA_DMA);

  TimerIntClear(TIMER3_BASE,TIMER_TIMA_DMA);
  //TimerIntRegister(TIMER3_BASE,TIMER_A,TimerInt);
 // TimerIntEnable(TIMER3_BASE,TIMER_TIMA_DMA);

  TimerDMAEventSet(TIMER2_BASE,TIMER_DMA_TIMEOUT_A);

  TimerDMAEventSet(TIMER3_BASE,TIMER_DMA_TIMEOUT_A);

}

void InituDMA(void)
{
    //Just disable to be able to reset the peripheral state
     SysCtlPeripheralDisable(SYSCTL_PERIPH_UDMA);
     SysCtlPeripheralReset(SYSCTL_PERIPH_UDMA);
     SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);

     SysCtlDelay(10);

     uDMAEnable();

     uDMAControlBaseSet(DMAcontroltable);

     uDMAChannelAssign(UDMA_CH14_TIMER2A);
     uDMAChannelAssign(UDMA_CH2_TIMER3A);
     uDMAChannelAssign(UDMA_CH4_TIMER2A);
     uDMAChannelAssign(UDMA_CH6_TIMER2A);

     uDMAChannelAttributeDisable(UDMA_CH14_TIMER2A,
       UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
       UDMA_ATTR_HIGH_PRIORITY |
       UDMA_ATTR_REQMASK);

     uDMAChannelAttributeDisable(UDMA_CH2_TIMER3A,
       UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
       UDMA_ATTR_HIGH_PRIORITY |
       UDMA_ATTR_REQMASK);

     //Disable all the atributes in case any was set
     uDMAChannelAttributeDisable(UDMA_CH4_TIMER2A,
       UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
       UDMA_ATTR_HIGH_PRIORITY |
       UDMA_ATTR_REQMASK);

     uDMAChannelAttributeDisable(UDMA_CH6_TIMER2A,
       UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
       UDMA_ATTR_HIGH_PRIORITY |
       UDMA_ATTR_REQMASK);

     /*
       This sets up the item size to 8bits, source increment to 8bits
       and destination increment to none and arbitration size to 1
     */

     uDMAChannelControlSet(UDMA_CH14_TIMER2A | UDMA_PRI_SELECT,
       UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE |
       UDMA_ARB_1);

     uDMAChannelControlSet(UDMA_CH2_TIMER3A | UDMA_PRI_SELECT,
       UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE |
       UDMA_ARB_1);

     uDMAChannelControlSet(UDMA_CH4_TIMER2A | UDMA_PRI_SELECT,
       UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE |
       UDMA_ARB_1);

     uDMAChannelControlSet(UDMA_CH6_TIMER2A | UDMA_PRI_SELECT,
       UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE |
       UDMA_ARB_1);

     uDMAChannelTransferSet(UDMA_CH14_TIMER2A | UDMA_PRI_SELECT,
             UDMA_MODE_BASIC,
       OutputState_B, (void *)(GPIO_PORTB_BASE + 0x3FC),
       1023);

     uDMAChannelTransferSet(UDMA_CH2_TIMER3A | UDMA_PRI_SELECT,
             UDMA_MODE_BASIC,
       OutputState_E, (void *)(GPIO_PORTE_BASE + 0x3FC),
       1023);

     uDMAChannelTransferSet(UDMA_CH4_TIMER2A | UDMA_PRI_SELECT,
             UDMA_MODE_BASIC,
       OutputState_D, (void *)(GPIO_PORTD_BASE + 0x3FC),
       1023);

     uDMAChannelTransferSet(UDMA_CH6_TIMER2A | UDMA_PRI_SELECT,
             UDMA_MODE_BASIC,
       OutputState_F, (void *)(GPIO_PORTF_BASE + 0x3FC),
       1023);


     uDMAChannelAttributeEnable(UDMA_CH14_TIMER2A, UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY);
     uDMAChannelAttributeEnable(UDMA_CH2_TIMER3A,  UDMA_ATTR_USEBURST);
     uDMAChannelAttributeEnable(UDMA_CH4_TIMER2A,  UDMA_ATTR_USEBURST);
     uDMAChannelAttributeEnable(UDMA_CH6_TIMER2A,  UDMA_ATTR_USEBURST);
/*
 | UDMA_ATTR_USEBURST |
     UDMA_ATTR_HIGH_PRIORITY |
     UDMA_ATTR_REQMASK

     */
     //Enable the DMA chanel
     uDMAChannelEnable(UDMA_CH14_TIMER2A);
     uDMAChannelEnable(UDMA_CH2_TIMER3A);
     uDMAChannelEnable(UDMA_CH4_TIMER2A);
     uDMAChannelEnable(UDMA_CH6_TIMER2A);

}
void InitGPIO(void)
{

    // Enable the peripherals used by this program.
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);

    GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, GPIO_PIN_7);
    GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
    GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);
    GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);

    HWREG(GPIO_PORTF_BASE+GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTF_BASE+GPIO_O_CR) |= GPIO_PIN_0;
    //   HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0;

    ulLoop = SYSCTL_RCGC2_R;

    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3);

    GPIO_PORTB_DATA_R = 0;
    GPIO_PORTD_DATA_R = 0;
    GPIO_PORTE_DATA_R = 0;
    GPIO_PORTF_DATA_R = 0;

}


int main(void)
{
    unsigned int tmp = 0, i = 0;

    SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ);

    InitGPIO();
    InituDMA();
    InitTimer();

        GPIO_PORTD_DATA_R &= ~4; // clear Clock_A
        GPIO_PORTF_DATA_R &= ~8;  // clear Clock_B
        GPIO_PORTD_DATA_R |= 32; // set Standby
        GPIO_PORTD_DATA_R &= ~16; // clear NRST


        for(ulLoop = 0; ulLoop < 1000000; ulLoop ++);

        GPIO_PORTD_DATA_R |= 16; // set NRST

        for(ulLoop = 0; ulLoop < 10000; ulLoop ++);


        TimerSynchronize(TIMER3_BASE,TIMER_2A_SYNC|TIMER_3A_SYNC);

        //Enable the timer to start counting
        HWREG(TIMER2_BASE + TIMER_O_CTL) |= 1;
        HWREG(TIMER3_BASE + TIMER_O_CTL) |= 1;

        while(1)
        {

            if (uDMAChannelModeGet(UDMA_CH6_TIMER2A) == UDMA_MODE_STOP)
            {
                TimerDisable(TIMER2_BASE,TIMER_A);
                TimerDisable(TIMER3_BASE,TIMER_A);
                //HWREG(UDMA_CHCTL) |= UDMA_MODE_BASIC;

                 uDMAChannelTransferSet(UDMA_CH14_TIMER2A | UDMA_PRI_SELECT,
                   UDMA_MODE_BASIC,
                   OutputState_B, (void *)(GPIO_PORTB_BASE + 0x3FC),
                   1023);

                 uDMAChannelTransferSet(UDMA_CH2_TIMER3A | UDMA_PRI_SELECT,
                   UDMA_MODE_BASIC,
                   OutputState_E, (void *)(GPIO_PORTE_BASE + 0x3FC),
                   1023);

                 uDMAChannelTransferSet(UDMA_CH4_TIMER2A | UDMA_PRI_SELECT,
                    UDMA_MODE_BASIC,
                    OutputState_F, (void *)(GPIO_PORTF_BASE + 0x3FC),
                    1023);

                  uDMAChannelTransferSet(UDMA_CH6_TIMER2A | UDMA_PRI_SELECT,
                    UDMA_MODE_BASIC,
                    OutputState_D, (void *)(GPIO_PORTD_BASE + 0x3FC),
                    1023);

                 uDMAChannelEnable(UDMA_CH14_TIMER2A);
                 uDMAChannelEnable(UDMA_CH2_TIMER3A);
                 uDMAChannelEnable(UDMA_CH4_TIMER2A);
                 uDMAChannelEnable(UDMA_CH6_TIMER2A);


                 TimerSynchronize(TIMER3_BASE,TIMER_2A_SYNC|TIMER_3A_SYNC);

                 //Enable the timer to start counting
                 HWREG(TIMER2_BASE + TIMER_O_CTL) |= 1;
                 HWREG(TIMER3_BASE + TIMER_O_CTL) |= 1;

                 TimerSynchronize(TIMER3_BASE,TIMER_2A_SYNC|TIMER_3A_SYNC);
            }

        }

    return 0;
}

  • 0
    TI__Guru 72500 points

    I suspect that 30 cycles at 80MHz is not enough cycles for the uDMA to have four channels reading from flash and the CPU executing from flash. Remember that at 80MHz each discrete access is two cycles. The CPU always takes priority over the uDMA.

  • 0 in reply to Bob Crosby
    Prodigy 40 points

    Thank you Bob, but I think, my output state variables are stored in the RAM, not in the flash. (I am using "static unsigned int") Am I right?

    Best Regards,

    Péter

  • 0 in reply to Szalai Peter
    TI__Guru 72500 points

    You are absolutely correct. Last night I read static and thought const. My bad.

    I still think you may be reaching the limits of the uDMA throughput. The uDMA is a state-machine and will not be able to do transfers every cycle. Look at the time between pin writes off of the same timer trigger. I expect it will be about 8 cycles. 

  • 0 in reply to Bob Crosby
    Prodigy 40 points

    Thank you Bob, I understand that the speed I want from the uDMA is unreachable. I solved the problem with other way. (Hard-coded the GPIO write instructions in a cycle). That is not an elegant solution, but it works: With 1st optimization level, the analog signals are fast enough.

    I have other questions if I may: With my solution, I am using the 100% of my CPU in most of the time, when the signals are synthesizing, so I shall use the uDMA  to fill three of my SSI peripherals. The concept is the following: PORTA is used as an 8bit parallel interface with one clock signal on PC4 pin. I should transfer the parallel data with that sequence:

    1.clk PORTA ->SSI3TXreg

    2.clk PORTA ->SSI2TXreg

    3.clk PORTA -> SSI1TXreg

    4.clk PORTA -> SSI3TXreg

    5.clk PORTA -> SSI2TXreg

    6clk...147clk...

    Questions: I did not find any information, if the uDMA can transfer from one peripheral to another one, or just to the SRAM? I don't have a lot of experience with the uDMA, so if someone would help me to solve this problem, I would be very grateful.

    Best Regards,

    Péter

  • 0 in reply to Szalai Peter
    TI__Guru 72500 points

    Wow, if you are that near 100% CPU already, it will be tricky. The datasheet only advertises memory to peripheral and peripheral to memory.That makes sense since most peripheral transfers are done when the peripheral sends a request.  I don't know what will happen if you use UDMA_CH6_GPIOC for the uDMA request and just use the address of the SSIxDR as the destination. You will have to make sure that you don't overflow the SSI TX FIFOs. You would use Peripheral Scatter-Gather mode.