Is there a way to configure the hercules such that reprogramming can occur while an external watchdog circuit is asserting the nRST pin?
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Is there a way to configure the hercules such that reprogramming can occur while an external watchdog circuit is asserting the nRST pin?
Hi Barrett,
A warm reset driven from an external circuit also causes the CPU to be reset, thereby not allowing the Flash memory to be programmed or erased using a JTAG based tool. If this is a requirement, the customer needs to explore how to lengthen the watchdog timeout period, or identify another mechanism to prevent the external circuit from asserting the warm reset.
Can you send me more information about the watchdog circuit? You can email this to me internally and not upload it to e2e.
Regards,
Sunil
Hi Barrett,
I presume this is closed per our email exchange. The solution is to disable the external watchdog without any MCU control so that flash operations can occur. Please let me know if you have any questions about the options provided.
Regards,
Sunil