TMDS570LS31HDK: PLL slip with ROS = reset. Then PLL bypassed.

Thomas Pikett

Part Number: TMDS570LS31HDK

In spnu499c.pdf in Table 2-44. PLL Control Register 1 (PLLCTL1), in Field MASK_SLIP there is a note:

If ROS (Bit 31) is set to 1, the device will be reset if a PLL Slip and the PLL will be bypassed after the reset occurs.

My question concerns the second half of this statement.

Does this mean that if ROS is set and MASK_SLIP is set to bypass on PLL slip, once a PLL slip occurs, PLL cannot be used?

over 6 years ago

0 Miro over 6 years ago

TI__Mastermind 21425 points

Hello Thomas,

You can follow PLL recovery procedure to enable PLL. Section 10.5.4 describes how to recover after PLL fail.

Best regards,
Miro

0 Thomas Pikett over 6 years ago in reply to Miro

Intellectual 580 points

Hi,

If the processor has just been reset ('cos ROS was set, MASK_SLIP was set to bypass on PLL slip and there has been a PLL slip) , can PLL be used?

The Note above suggests not: ' the PLL will be bypassed after the reset occurs'.

Is the Note inaccurate, misleading or incomplete?

Regards,

Tom

0 Miro over 6 years ago in reply to Thomas Pikett

TI__Mastermind 21425 points

Hello,

The PLL will be bypassed after reset but you can enable it following the recovery procedure.

Best regards,
Miro

0 Thomas Pikett over 6 years ago in reply to Miro

Intellectual 580 points

After a reset the start up process assumes the PLL is disabled and configures it and maps the clocks.

Is this still possible after a PLL slip with ROS set?

I assume that a reset is a complete reset regarding the settings of all the configuration registers, so that recovery from PLL slip is

only practical as a result of detection (say by esm) without a reset.

0 Sunil Oak over 6 years ago in reply to Thomas Pikett

TI__Mastermind 49120 points

Hi Thomas,

A system reset does not reset the PLL SLIP flags in the global status register. These must be cleared before the PLL is enabled again, which is part of the recovery procedure from a PLL slip condition.

Regards,

Sunil

0 Thomas Pikett over 6 years ago in reply to Sunil Oak

Intellectual 580 points

Hi Sunil,

Thanks, it now makes sense.

Regards,

Tom

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TMDS570LS31HDK: PLL slip with ROS = reset. Then PLL bypassed.